68200 Commits

Author SHA1 Message Date
Rosen Penev
de96f66acf ipq60xx: linksys: add partition selection
Instead of upgrading both kernels, allow support for selecting the
partition during sysupgrade.

Copy/Paste of Linux MX devices on the same target.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22594
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 14:20:20 +02:00
Paweł Owoc
263751111e uboot-envtools: add u-boot-env for EX5601/WX5600
Add ability to read u-boot-env partition as sys env
for Zyxel EX5601 and WX5600 with custom partitions.

Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22670
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 14:17:21 +02:00
Zoltan HERPAI
923b69ad16 wolfssl: allow enabling RISC-V assembler optimization
wolfssl implemented AES ECB/CBC/CTR/GCM/CCM in RISC-V assembler,
achieving massive speed improvements on boards with such CPUs.

Benchmarking on a Sifive Unleashed (oldest Linux-capable RISC-V board),
results are:

No optimization:
wolfCrypt Benchmark (block bytes 1048576, min 1.0 sec each)
RNG                         10 MiB took 1.772 seconds,    5.644 MiB/s
AES-128-CBC-enc              5 MiB took 16.264 seconds,    0.307 MiB/s
AES-128-CBC-dec              5 MiB took 16.314 seconds,    0.306 MiB/s
AES-192-CBC-enc              5 MiB took 19.460 seconds,    0.257 MiB/s
AES-192-CBC-dec              5 MiB took 19.480 seconds,    0.257 MiB/s
AES-256-CBC-enc              5 MiB took 22.633 seconds,    0.221 MiB/s
AES-256-CBC-dec              5 MiB took 22.715 seconds,    0.220 MiB/s
AES-128-GCM-enc              5 MiB took 16.324 seconds,    0.306 MiB/s
AES-128-GCM-dec              5 MiB took 16.450 seconds,    0.304 MiB/s
AES-192-GCM-enc              5 MiB took 19.487 seconds,    0.257 MiB/s
AES-192-GCM-dec              5 MiB took 19.621 seconds,    0.255 MiB/s
AES-256-GCM-enc              5 MiB took 22.644 seconds,    0.221 MiB/s
AES-256-GCM-dec              5 MiB took 22.805 seconds,    0.219 MiB/s
[...]

Enabled optimization:
wolfCrypt Benchmark (block bytes 1048576, min 1.0 sec each)
RNG                         10 MiB took 1.459 seconds,    6.855 MiB/s
AES-128-CBC-enc             15 MiB took 1.028 seconds,   14.592 MiB/s
AES-128-CBC-dec             15 MiB took 1.006 seconds,   14.916 MiB/s
AES-192-CBC-enc             15 MiB took 1.187 seconds,   12.634 MiB/s
AES-192-CBC-dec             15 MiB took 1.180 seconds,   12.713 MiB/s
AES-256-CBC-enc             15 MiB took 1.359 seconds,   11.037 MiB/s
AES-256-CBC-dec             15 MiB took 1.352 seconds,   11.096 MiB/s
AES-128-GCM-enc             10 MiB took 1.140 seconds,    8.769 MiB/s
AES-128-GCM-dec             10 MiB took 1.140 seconds,    8.770 MiB/s
AES-192-GCM-enc             10 MiB took 1.256 seconds,    7.963 MiB/s
AES-192-GCM-dec             10 MiB took 1.261 seconds,    7.931 MiB/s
AES-256-GCM-enc             10 MiB took 1.373 seconds,    7.285 MiB/s
AES-256-GCM-dec             10 MiB took 1.371 seconds,    7.291 MiB/s

HMAC- and SHA- functions also have significant improvements.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Link: https://github.com/openwrt/openwrt/pull/22702
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 14:13:11 +02:00
Markus Stockhausen
d7de7cae1a realtek: dts: convert devices to PHY_C45()
Make the remaining devices use the new PHY_C45() macro. At least
those that have no extra attributes in the phy definitions.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22715
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 14:12:14 +02:00
Markus Stockhausen
e0287f7aba realtek: dts: add PHY_C45() macro
Like the PHY_C22() macro before add a helper that allows to define
a C45 based phy. It works basically the same with two parameters
PHY_C45(port_number, bus_address) where

- port_number is the absolute overall unique phy number
- bus_address is the location of the phy on the bus

As a first consumer adapt the Xikestor SKS8300-8T devicetree.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22715
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 14:12:14 +02:00
Aleksander Jan Bajkowski
21704379e0 mediatek: backport upstream thermal patch for mt7981
Backport upstream patch that adds node for thermal driver.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/22646
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 14:10:26 +02:00
Shiji Yang
2f44a5177d kernel: tune 24kc instead of 34kc for mips32r2
GCC generates the same code for 24kc and 34kc. Since we have
converted all 34kc targets to the 24kc, it's better to switch
kernel -mtune to 24kc to avoid confusing developers.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22703
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 14:05:56 +02:00
Robert Marko
e0cfd7f58b realtek: refresh patches
It seems that Realtek patches need to be refreshed after MXL DSA update.

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 13:41:11 +02:00
Robert Marko
dad9df16ee ipq40xx: refresh patches
It seems that a refresh is needed after the MXL DSA driver update.

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 13:25:22 +02:00
Rosen Penev
f259fae36c libunwind: replace local patches with upstream
libunwind solves these in different ways.

ppc-musl is still pending upstream.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21057
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-04-01 12:07:40 +02:00
Christian Marangi
2f52b8f724
airoha: backport minor fixup for Ethernet driver on Offload Scenario
Backport minor fixup merged upstream for Ethernet driver on Offload
Scenario. This is to continue the effort of keeping the Airoha Ethernet
driver synced with the upstream version.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2026-04-01 09:08:57 +02:00
Rustam Adilov
cd0f6ddf13 realtek: i2c: rtl9300: backport driver cleanup patches
Backport 2 patches from [1] that cleanup the i2c-rtl9300 upstream driver.
They have been long accepted and are already in mainline kernel as of 7.0-rc1.

The "100-rtl9300-i2c-add-more-speeds.patch" required refreshing after adding
these backport patches.

[1] - https://lore.kernel.org/linux-i2c/20251217063027.37987-1-rosenp@gmail.com/

Signed-off-by: Rustam Adilov <adilov@tutamail.com>
Link: https://github.com/openwrt/openwrt/pull/22662
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-31 23:39:57 +02:00
Markus Stockhausen
59f146c581 realtek: dsa: move fib_entries to config structure
The fib_entries attribute is a device specific constant.
Therefore move it into the configuration structure. Add
a comment why someone used 16K fib_entries for RTL931x
instead of the possible 32K.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-31 23:35:22 +02:00
Markus Stockhausen
85961cc798 realtek: dsa: drop port_width from instance structure
The port_width attribute is only used once and can be derived
from the cpu_port. Drop it. Add a comment for better readability.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-31 23:35:22 +02:00
Markus Stockhausen
09c9de1128 realtek: dsa: drop port_mask from instance structure
The port_mask attribute is set but never used. Drop it.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-31 23:35:22 +02:00
Markus Stockhausen
ef320ef114 realtek: dsa: move cpu_port to config structure
The cpu_port is a per-device constant. Thus move it from the
instance structure to the config structure.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-31 23:35:22 +02:00
Robert Marko
da9eee7c55 generic: 6.18: hack: io_uring: zcrx: Use IS_REACHABLE() instead of IS_ENABLED()
We patch DMA_BUF to make it tristate, so once ALL_KMODS is selected it will
be built as a module even if previously disabled in the config.

So, since IO_URING_ZCRX does not depend on DMA_BUF linking will fail with:
aarch64-openwrt-linux-musl-ld: Unexpected GOT/PLT entries detected!
aarch64-openwrt-linux-musl-ld: Unexpected run-time procedure linkages detected!
aarch64-openwrt-linux-musl-ld: io_uring/zcrx.o: in function `io_release_dmabuf':
io_uring/zcrx.c:94:(.text+0x20): undefined reference to `dma_buf_unmap_attachment_unlocked'
aarch64-openwrt-linux-musl-ld: io_uring/zcrx.c:97:(.text+0x30): undefined reference to `dma_buf_detach'
aarch64-openwrt-linux-musl-ld: io_uring/zcrx.c:99:(.text+0x3c): undefined reference to `dma_buf_put'
aarch64-openwrt-linux-musl-ld: io_uring/zcrx.o: in function `io_import_dmabuf':
io_uring/zcrx.c:125:(.text+0x1b20): undefined reference to `dma_buf_get'
aarch64-openwrt-linux-musl-ld: io_uring/zcrx.c:132:(.text+0x1b34): undefined reference to `dma_buf_attach'
aarch64-openwrt-linux-musl-ld: io_uring/zcrx.c:139:(.text+0x1b48): undefined reference to `dma_buf_map_attachment_unlocked'
make[6]: *** [scripts/Makefile.vmlinux:72: vmlinux.unstripped] Error 1

So, lets use IS_REACHABLE() to check for CONFIG_DMA_SHARED_BUFFER instead
to avoid adding a dependency to CONFIG_DMA_SHARED_BUFFER.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-03-31 18:55:50 +02:00
Emre Yavuzalp
776a926c25 mediatek: filogic: ASUS RT-AX52 PRO support
The board is exactly identical to the ASUS RT-AX52, I've literally not changed a single thing.
Only AX52 is AX1800, PRO is AX3000.

SOC: MediaTek MT7981b
RAM: 256MB DDR3
FLASH: 128MB SPI-NAND (Winbond W25N01GV)
WIFI: Mediatek MT7981b DBDC 802.11ax 2.4/5 GHz
ETH: MediaTek MT7531 Switch
UART: 3V3 115200 8N1 (Pinout silkscreened / Do not ocnnect VCC)

Use the compiled asus_rt-ax52-pro-initramfs.trx file from the this repo.

Connect the PC via LAN to one of the yellow router ports and wait until your PC to get a DHCP lease.

Browse to http://192.168.50.1 or http://www.asusrouter.com/

If your router is brand new, finish the setup process and log into the Web-UI.

Navigate to Administration → Firmware Upgrade or use this link http://www.asusrouter.com/Advanced_FirmwareUpgrade_Content.asp.

Upload the .trx file to router

Wait for it to reboot

trx image is initramfs version. You must upgrade to squashfs version.

Browse to http://192.168.1.1/cgi-bin/luci/admin/system/flash

Upload asus_rt-ax52-pro-squashfs-sysupgrade.bin and use sysupgrade -n

Wait for it to reboot

SSH to 192.168.1.1 and set a root password, or browse to http://192.168.1.1

-------Revert to stock asus firmware ---------:
1: Download the rt-ax52 firmware from ASUS official website. Save the firmware to tftp server directory and rename to RT-AX52.trx

2: Connect the PC with TFTP server to the RT-AX52. Set a static ip on the ethernet interface of your PC. (ip address: 192.168.1.70, subnet mask:255.255.255.0)

3: Conect to the serial console, power on again, interrupt the autoboot process by pressing '4' when prompted. $ ubi remove linux
$ ubi remove jffs2
$ ubi remove rootfs
$ ubi remove rootfs_data
$ ubi create linux 0x45fe000
$ reset
then the dut will reboot,interrupt the autoboot process by pressing '2' when prompted. 2: Load System code then write to Flash via TFTP.
Warning!! Erase Linux in Flash then burn new one. Are you sure?(Y/N) $: enter y
you will see the follow, type enter directly:
Input device IP (192.168.1.1) ==:
Input server IP (192.168.1.70) ==:
Input Linux Kernel filename (RT-AX52.trx) ==:

4: wait for the device run up

Signed-off-by: Emre Yavuzalp <emreyavuzalp2@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21905
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-31 16:56:03 +02:00
Shiji Yang
74fe4b014c ramips: fix WAN LED GPIO for Xiaomi Mi Router 4C
Correct WAN LED GPIO and its pinctrl group.

Fixes: https://github.com/openwrt/openwrt/issues/18578
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22696
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-31 15:45:30 +02:00
Shiji Yang
58d8733b08 lantiq: fix u-boot env size for Netgear DGN3500
Correct u-boot env size to fix ethernet driver probe defer.

Fixes: https://github.com/openwrt/openwrt/issues/22692
Fixes: 75b9fae0c338 ("lantiq: dgn3500: use nvmem to load calibration")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22695
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-31 15:42:31 +02:00
Markus Stockhausen
b3f6ae604f realtek: dts: convert nand targets to PHY_C22() macro
Make use of the newly invented PHY_C22() macro for the
RTL93xx Linksys LGS3xxC NAND devices.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22698
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 12:56:24 +02:00
Markus Stockhausen
316f41e310 realtek: dts: convert EXTERNAL_PHY() to PHY_C22()
The Realtek target currently uses two phy macros to simplify the
device dts.

- EXTERNAL_PHY() to denote a phy attached to the SoC
- INTERNAL_PHY() to denote an internal PHY (inside the SoC)

There is no benefit doing this. The topology around a port/phy is
well defined by the port macros. They link port, phy, pcs and even
leds. The only consumer of the attribute "phy-is-integrated" is
inside the dsa driver and that is being refactored.

As a first step define a new more meaningful PHY_C22() macro that
describes a c22 capable phy. This does not need to care about the
external/internal relation. To make it even more useful for the
RTL93xx targets with multiple mdio busses give it two parameters
PHY_C22(port_number, bus_address) where

- port_number is the absolute overall unique phy number
- bus_address is the location of the phy on the bus

For RTL83xx these two parameters will usually be the same. Instead
of three steps (inventing the macro, converting the consumers and
removeing the old macor) do a one-step conversion for the existing
EXTERNAL_PHY() macro.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22698
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 12:56:24 +02:00
Markus Stockhausen
f1f0572d1f realtek: dsa: remove redundant integrated phy attribute
The dsa driver currently has different attributes to denote what
hardware is around a port:

- phy_is_integrated: true if phy is not driven by a serdes
- phy: the type of the attached phy (e.g. 0=NONE, 2=RTL8218B, ....)
- pcs: link to a serdes pcs instance

This is somehow redundant and especially the phy type should be only
part of the phy driver and is not needed by the dsa driver at all.
Remove the redundancy by simply keeping a boolean attribute "phy" that
flags a phy driven port and can be used similar to the pcs (pointer)
attribute. With that the driver can check phy/pcs as follows:

- if (ports[i].pcs) -> port has a dedicated serdes
- if (ports[i].phy) -> port has a dedicated phy

That implemented, the "phy-is-integrated" attribute of a phy can be
removed from the dts. This will be a separate commit. As a side effect
the following (annoying) boot message for kernel 6.18 gets fixed.

OF: /switchcore@1b000000/mdio-controller/mdio-bus@0/ethernet-phy@24:
Read of boolean property 'sfp' with a value.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22698
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 12:56:24 +02:00
Jonas Jelonek
78ffee0ed2 realtek: force in-band autoneg on XGS1250-12 A1 10G PHYs
In kernel 6.18, upstream added a change to the Aquantia PHY driver which
reports autoneg and inband capabilities as the PHY supports it, and
configures it accordingly in the PHY [1]. Due to how phylink works, it
then decides to turn off in-band signalling and prefer outband signalling
via MDIO.

We do not fully support running a USXGMII link with disabled
autonegotiation which leads to a non-working link between RTL93xx switch
and Aquantia PHYs running on USXGMII. To workaround this issue until
this support is added (if it is properly supported by the hardware),
force the Aquantia PHYs on affected devices to use inband signalling
instead of outband signalling. To achieve this, one can add

> managed = "in-band-status";

to the port definition in the DTS.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=5d59109d47c00e3e98aba612529b3871e69efb9d

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22690
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 12:54:57 +02:00
Jonas Jelonek
cfe573350b realtek: dts: use SWITCH_PORT_LED for XGS1250-12
Switch the common DTS for Zyxel XGS1250-12 variants to the recently
added SWITCH_PORT_LED macro to reduce boilerplate and make the DTS
cleaner. As a side effect, this also assign labels to the port nodes so
they can be referenced by the variant-specific device tree sources.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22690
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 12:54:57 +02:00
Rosen Penev
0278e25d67 ar8327: use flex array for name
Simplifies allocation.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22069
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 11:44:27 +02:00
Rosen Penev
96a8957b7d ar8327: remove unused code
This code seems to predate OF.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22069
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 11:44:27 +02:00
Rosen Penev
fcd06f5915 ar8327: remove platform data support
All targets using ar8327 use OF.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22069
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-31 11:44:27 +02:00
Daniel Golle
5ee6ddb461 kernel: update MxL862xx DSA driver
Introduce fix which prevents the kernel from crashing in case the mxl862xx
driver fails to probe due to outdated firmware running on the switch.
Cancel all pending work and prevent rescheduling of counter polling in case
the driver errors out during probe.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2026-03-31 03:37:14 +01:00
Paweł Owoc
598b90107e treewide: linksys: remove unnecessary properties
Remove unnecessary properties as there is no
reg property in child node.

Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22592
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-30 19:35:41 +02:00
Paweł Owoc
9270415d51 qualcommax: ipq807x: use ascii-env driver
Use ascii-env driver for reading mac addresses directly
from devinfo partition for:
- Linksys MX5300
- Linksys HomeWRK

Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22592
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-30 19:35:41 +02:00
Robert Marko
ad7d6b6bff qualcommax: refresh patches
Refresh qualcommax patches, this one seems to have slipped in after kernel
bump.

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-30 19:30:55 +02:00
Sander Vanheule
ce342ee8d3 realtek: rtl839x: support GS1900-48 A1 port LEDs
Add the RTL8231 controlling the port LEDs to the devicetree, so users
can enable them. Using the appropriate link name, the netdev trigger can
be used to reflect the port status. As no hardware port status
offloading is supported, blinking on traffic could result in increased
load due to the numerous LED updates.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2026-03-30 19:18:56 +02:00
Sander Vanheule
5592faaa07 realtek: rtl839x: enable RTL8231 LED driver
To enable the use of the RTL8231 to control (port) LEDs, the driver
needs to be enabled in the build. Incorporate it into the kernel, so any
LED consumers also work in failsafe mode.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2026-03-30 19:18:56 +02:00
Sander Vanheule
597e1fdf7f realtek: rtl839x: add port LED peripheral disable
Add a pinctrl-single node to the switch GPIO/LED control register that
disables the port LED peripheral when selected. When an RTL8231 is
instantiated, this is required to prevent the user config from being
overwritten by the peripheral.

As this is technically not a pin mux operation, but rather a peripheral
disable, using pinctrl-single for this purpose is bit of a hack, but it
does the job.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2026-03-30 19:18:56 +02:00
Sander Vanheule
2fffb27c98 realtek: disable synchronous operation on RTL8231
It may be possible that the bootloader has left an RTL8231 expander
configured for synchronous operation, which requires the user to signal
that the new GPIO/LED states should be latched.

As drivers typically perform one operation at a time for the higher
level kernel framework, this would require a latch on every update,
which is not very useful. Disable synchronous operation to keeps things
simple.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2026-03-30 19:18:56 +02:00
Sander Vanheule
c98289b074 realtek: fix regmap_field getter const qualifier
The allocated regmap_field object is not stored as a const reference, so
the helper function allocating the object should not return it as such.

Drop 'const' so the build doesn't complain about discarding the
qualifier.

Fixes: 6ef6014887c3 ("realtek: Add pinctrl support for RTL8231")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2026-03-30 19:18:56 +02:00
Sander Vanheule
75a33df5f6 realtek: fix RTL8231 LED toggle interval clamping
The loop scanning the available toggle rates would stop when the
requested interval exceeded the tested interval. Since the intervals are
searched from small to large, this would always trigger on the shortest
interval, or skip to the largest interval for small requested values.

To correctly clamp (ceil) the toggle rate, the loop needs to continue
until the condition is met, instead of breaking the loop.

Fixes: 6ef6014887c3 ("realtek: Add pinctrl support for RTL8231")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2026-03-30 19:18:56 +02:00
Sander Vanheule
5ecbd2f90c realtek: mark gpio-regmap patch as upstreamed
The code in 800-gpio-regmap-Bypass-cache-for-shadowed-outputs.patch
was accepted upstream as commit 897396b418d1 ("gpio: regmap: Bypass
cache for aliased inputs"). Update the filename to reflect the first
release containing this change.

Signed-off-by: Sander Vanheule <sander@svanheule.net>
2026-03-30 19:18:56 +02:00
Robert Marko
aa5369e708 qualcommax: ipq50xx: refresh config
Refresh qualcommax/ipq50xx config.

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-30 19:15:43 +02:00
Markus Stockhausen
4439b2ddc2 realtek: add support for D-Link DGS-1250-28X
Hardware specification
----------------------

* RTL9301 SoC, 1 MIPS 34KEc core @ 800MHz
* 512MB DRAM
* 64MB NAND Flash
* 24 x 10/100/1000BASE-T ports
* 4 x 10G SFP+ ports
* Power LED, Console LED, Fan Fault LED
* Reset button on front panel
* LM75 temperature sensor
* Atmel AT24C02 2kb eeprom
* fan (controllable via gpio for on/off and LM75 for low/high speed)
* UART (115200 8N1) via RJ45

Installation using serial interface
-----------------------------------

 1. Prepare TFTP server & connect to serial port.
 2. Connect DGS-1250 to your computer or network with one of the
    1G ports. All of them will be fine.
 3. Power on DGS-1250 and interrupt autoboot with "&".
 4. Change U-Boot startup sequence
	> setenv silent
	> setenv bootcmd 'cp.l 0xb4200000 0x84000000 0x300000; bootm 0x84000000'
	> saveenv
 5. Enable networking within U-Boot.
	> rtk network on
 6. Set switch IP and TFTP server IP (optional, adjust to your setup).
	> setenv ipaddr <ip>
	> setenv serverip <ip>
 7. Download initramfs image from TFTP server.
	> tftpboot 0x84000000 <image name>
 8. Boot with the downloaded image.
	> bootm 0x84000000
 9. With rambooted OpenWrt, backup the stock firmware.
    THIS IS CRITICAL! /dev/mtd3 contains data that is not provided
    in the downloadable vendor firmware images.
10. Copy sysupgrade image to the device.
11. Perform sysupgrade with the sysupgrade image.
12. After reboot, you should have functional OpenWrt.

Installation using OEM webinterface
-----------------------------------

This is not possible because the vendor image uses a ubifs based
loading technique with encrypted images. To be precise the boot
sequence basically runs as follows.

 1. U-Boot starts
 2. U-Boot mounts 62MB ubifs from mtd3
 3. U-Boot reads Linux kernel from file uImage inside ubifs
 4. Linux starts (this is a initramfs image)
 5. Linux mounts ubifs
 6. Linux calls a loader binary
 7. Depending on current configuration first (file Image1) or
    second firmware image (file Image2) is loaded and decrypted
 8. Inside the decrpyted firmware image there is a executable
    named “switch”
 9. "switch" executable is run and the switch comes alive

Reverting to stock firmware
---------------------------

 1. Boot OpenWrt from initramfs (like in installation section above)
 2. Restore partition /dev/mtd3 from backup
 3. Erase Openwrt special U-Boot env
	# mtd erase mtd1
 4. reboot

Further information
-------------------

Wiki: https://openwrt.org/toh/d-link/dgs-1250
Forum: https://forum.openwrt.org/t/support-for-d-link-dgs-1250-switches
Partition dumps: https://github.com/plappermaul/realtek-doc/tree/main/DGS-1250

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22530
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-30 19:10:46 +02:00
Robert Marko
5017117fa6 qualcommax: ipq60xx: refresh config
Refresh qualcommax/ipq60xx config.

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-30 18:55:24 +02:00
Robert Marko
569d9ee9c8 qualcommax: refresh config
Refresh the qualcommax generic config.

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-30 18:50:16 +02:00
Robert Marko
0cf636c8c6 generic: filter out CONFIG_TOOLS_SUPPORT_RELR
CONFIG_TOOLS_SUPPORT_RELR is set during runtime by the kernel so it should
not end up in our static configs.

So, filter it out by default.

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-30 18:42:13 +02:00
Robert Marko
db75f17058 generic: add missing MXL862 DSA symbols
If DSA support is enabled, then these will pop up.
So instead of ending up in target configs, add them to the generic configs.

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-03-30 18:42:07 +02:00
Markus Stockhausen
3f76802660 realtek: mdio-serdes: reorganize RTL839x TGRX0/1 pages
The four TGRX pages are currently mapped into the page range 4-7 for even
10G serdes. This is only partly right. TGRX0/1 better aligns with RTL93xx
pages TGX_STD_0/TGX_STD_1. Change the mapping. No code update needed as
the pages are not yet used anywhere.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-30 15:35:13 +02:00
Markus Stockhausen
e6b297a970 realtek: mdio-serdes: reorganize RTL839x ANA_RG pages
The ANA_RG pages of the RTL839x SerDes are a wild mix of WDIG, ANA_MISC
and ANA_1G2 data. Its current mapping to the TGX_STD_0 register does
not match at all. From the coding it makes most sense to remap it to the
ANA_1G2/ANA_1G2_EXT range. Adapt all consumers in the pcs driver
accordingly.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-30 15:35:13 +02:00
Markus Stockhausen
2ee0beea6e realtek: mdio-serdes: reorgnaize RTL839x ANA_10G pages
With all the recent development about RTL93xx serdes it has become
clear that the RTL839x ANA_TG page mapping is not perfect. Until
know it is mapped to pages 10/11. As its naming suggests these are
serdes analogous register settings for 10G. Map it to the appropriate
ANA_10G pages to align better with RTL93xx. Adapt all consumers
in the pcs driver accordingly.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-30 15:35:13 +02:00
Markus Stockhausen
ae2ce7faa3 realtek: mdio-serdes: rename debug serdes pages
The initial page naming of the debugfs page registers in the mdio
serdes driver was a mix of RTL839x and RTL93xx. Developing the
Realtek pcs driver, it was discovered that the RTL93xx IP block
shares a lot of the registers with the RTL8295 PHY.

The RTL839x serdes development is quite okay and currently on hold.
Thus drop the RTL839x derived page names and substitute them for
their RTL93xx counterpart.

This is only a cosmetic change for better readability.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-30 15:35:13 +02:00
Markus Stockhausen
c1804cbc71 realtek: dts: cleanup of ethernet link speed
Realtek switches have a very simple network adapter for the SOC.
They can ship packets via DMA without further offloading features.
Even on the RTL931x devices they can barely reach 50MB/s. In the
dts there is a mix of 1G/10G definitions. To be consistent and
better reflect the performance set the link speed to 1000.
This is only cosmetic.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22639
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-03-30 15:00:31 +02:00