realtek: mdio-serdes: reorganize RTL839x ANA_RG pages

The ANA_RG pages of the RTL839x SerDes are a wild mix of WDIG, ANA_MISC
and ANA_1G2 data. Its current mapping to the TGX_STD_0 register does
not match at all. From the coding it makes most sense to remap it to the
ANA_1G2/ANA_1G2_EXT range. Adapt all consumers in the pcs driver
accordingly.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22633
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Markus Stockhausen 2026-03-27 10:43:57 +01:00 committed by Hauke Mehrtens
parent 2ee0beea6e
commit e6b297a970
2 changed files with 11 additions and 10 deletions

View File

@ -233,8 +233,9 @@ static int rtsds_838x_write(struct rtsds_ctrl *ctrl, int sds, int page, int regn
* 0x05 (TGR_STD_1) <zero> <zero> TGRX/1 <zero>
* 0x06 (TGR_PRO_0) <zero> <zero> TGRX/2 <zero>
* 0x07 (TGR_PRO_1) <zero> <zero> TGRX/3 <zero>
* 0x08 (TGX_STD_0) ANA_RG ANA_RG <zero> <zero>
* 0x09 (TGX_STD_1) ANA_RG_EXT ANA_RG_EXT <zero> <zero>
* ... <zero> <zero> <zero> <zero>
* 0x24 (ANA_1G2) ANA_RG ANA_RG <zero> <zero>
* 0x25 (ANA_1G2_EXT) ANA_RG_EXT ANA_RG_EXT <zero> <zero>
* ... <zero> <zero> <zero> <zero>
* 0x2e (ANA_10G) <zero> <zero> ANA_TG ANA_TG
* 0x2f (ANA_10G_EXT) <zero> <zero> ANA_TG_EXT ANA_TG_EXT
@ -249,8 +250,8 @@ static int rtsds_839x_reg_offset(int sds, int page, int regnum)
return offset + (page << 6) + ((sds & 1) << 8);
else if (page >= 4 && page <=7 && (sds == 8 || sds == 12))
return offset + (page << 6) + 0x100;
else if (page >= 8 && page <= 9 && sds5g)
return offset + (page << 6) + 0x100 + ((sds & 1) << 7);
else if (page >= 0x24 && page <= 0x25 && sds5g)
return offset + ((page - 0x1c) << 6) + 0x100 + ((sds & 1) << 7);
else if (page >= 0x2e && page <= 0x2f && !sds5g)
return offset + ((page - 0x24) << 6) + 0x80 + ((sds & 1) << 7);

View File

@ -906,14 +906,14 @@ static void rtpcs_839x_sds_reset(struct rtpcs_serdes *sds)
msleep(100);
rtpcs_sds_write_bits(even_sds, 0x2f, 0x0, 15, 15, 0x0);
} else {
rtpcs_sds_write(odd_sds, 0x9, 0x1, 0x0050);
rtpcs_sds_write(odd_sds, 0x9, 0x1, 0x00f0);
rtpcs_sds_write(odd_sds, 0x9, 0x1, 0x0000);
rtpcs_sds_write(odd_sds, 0x25, 0x1, 0x0050);
rtpcs_sds_write(odd_sds, 0x25, 0x1, 0x00f0);
rtpcs_sds_write(odd_sds, 0x25, 0x1, 0x0000);
rtpcs_sds_write_bits(sds, 0x8, 0x14, 0, 0, 0x0);
rtpcs_sds_write_bits(sds, 0x8, 0x14, 9, 9, 0x1);
rtpcs_sds_write_bits(sds, 0x24, 0x14, 0, 0, 0x0);
rtpcs_sds_write_bits(sds, 0x24, 0x14, 9, 9, 0x1);
msleep(100);
rtpcs_sds_write_bits(sds, 0x8, 0x14, 9, 9, 0x0);
rtpcs_sds_write_bits(sds, 0x24, 0x14, 9, 9, 0x0);
}
rtpcs_sds_write(even_sds, 0x0, 0x3, 0x7146);