realtek: dsa: drop port_width from instance structure

The port_width attribute is only used once and can be derived
from the cpu_port. Drop it. Add a comment for better readability.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Markus Stockhausen 2026-03-29 19:55:34 +02:00 committed by Hauke Mehrtens
parent 09c9de1128
commit 85961cc798
3 changed files with 2 additions and 6 deletions

View File

@ -1610,7 +1610,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
case RTL8380_FAMILY_ID:
priv->ds->ops = &rtldsa_83xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops;
priv->port_width = 1;
priv->fib_entries = 8192;
priv->ds->num_lag_ids = 8;
priv->l2_bucket_size = 4;
@ -1619,7 +1618,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
case RTL8390_FAMILY_ID:
priv->ds->ops = &rtldsa_83xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops;
priv->port_width = 2;
priv->fib_entries = 16384;
priv->ds->num_lag_ids = 16;
priv->l2_bucket_size = 4;
@ -1628,7 +1626,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
case RTL9300_FAMILY_ID:
priv->ds->ops = &rtldsa_93xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops;
priv->port_width = 1;
priv->fib_entries = 16384;
priv->ds->num_lag_ids = 16;
sw_w32(0, RTL930X_ST_CTRL);
@ -1638,7 +1635,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
case RTL9310_FAMILY_ID:
priv->ds->ops = &rtldsa_93xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops;
priv->port_width = 2;
priv->fib_entries = 16384;
priv->ds->num_lag_ids = 16;
sw_w32(0, RTL931x_ST_CTRL);

View File

@ -1452,10 +1452,11 @@ static void rtldsa_port_xstp_state_set(struct rtl838x_switch_priv *priv, int por
u8 state, u16 mst_slot)
__must_hold(&priv->reg_mutex)
{
/* 838x/930x have 28 ports and 2 bit fields other devices 4 bit fields. */
int n = priv->r->cpu_port == RTL838X_CPU_PORT ? 2 : 4;
u32 port_state[4];
int index, bit;
int pos = port;
int n = priv->port_width << 1;
/* Ports above or equal CPU port can never be configured */
if (port >= priv->r->cpu_port)

View File

@ -1516,7 +1516,6 @@ struct rtl838x_switch_priv {
int mirror_group_ports[4];
struct mii_bus *parent_bus;
const struct rtldsa_config *r;
u8 port_width;
u64 irq_mask;
u32 fib_entries;
int l2_bucket_size;