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realtek: dsa: move cpu_port to config structure

Browse Source 
The cpu_port is a per-device constant. Thus move it from the
instance structure to the config structure.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Markus Stockhausen 2026-03-29 19:43:38 +02:00 committed by Hauke Mehrtens
parent da9eee7c55
commit ef320ef114
10 changed files with 68 additions and 68 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/common.c
View File

@ -24,7 +24,7 @@ int rtldsa_port_get_stp_state(struct rtl838x_switch_priv *priv, int port)
u32 msti = 0;
int state;
if (port >= priv->cpu_port)
if (port >= priv->r->cpu_port)
return -EINVAL;
mutex_lock(&priv->reg_mutex);
@ -298,7 +298,7 @@ static int rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
pcs_node = of_parse_phandle(dn, "pcs-handle", 0);
phy_node = of_parse_phandle(dn, "phy-handle", 0);
if (pn != priv->cpu_port && !phy_node && !pcs_node) {
if (pn != priv->r->cpu_port && !phy_node && !pcs_node) {
dev_err(priv->dev, "Port node %d has neither pcs-handle nor phy-handle\n", pn);
continue;
}
@ -813,7 +813,7 @@ int rtl83xx_port_is_under(const struct net_device *dev, struct rtl838x_switch_pr
* }
*/
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
if (!priv->ports[i].dp)
continue;
if (priv->ports[i].dp->user == dev)
@ -1520,7 +1520,7 @@ static irqreturn_t rtldsa_switch_irq(int irq, void *dev_id)
link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
for (int port = 0; port < priv->cpu_port; port++)
for (int port = 0; port < priv->r->cpu_port; port++)
if (ports & BIT_ULL(port))
dsa_port_phylink_mac_change(ds, port, link & BIT_ULL(port));
@ -1610,7 +1610,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
case RTL8380_FAMILY_ID:
priv->ds->ops = &rtldsa_83xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops;
priv->cpu_port = RTL838X_CPU_PORT;
priv->port_mask = 0x1f;
priv->port_width = 1;
priv->fib_entries = 8192;
@ -1621,7 +1620,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
case RTL8390_FAMILY_ID:
priv->ds->ops = &rtldsa_83xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops;
priv->cpu_port = RTL839X_CPU_PORT;
priv->port_mask = 0x3f;
priv->port_width = 2;
priv->fib_entries = 16384;
@ -1632,7 +1630,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
case RTL9300_FAMILY_ID:
priv->ds->ops = &rtldsa_93xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops;
priv->cpu_port = RTL930X_CPU_PORT;
priv->port_mask = 0x1f;
priv->port_width = 1;
priv->fib_entries = 16384;
@ -1644,7 +1641,6 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
case RTL9310_FAMILY_ID:
priv->ds->ops = &rtldsa_93xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops;
priv->cpu_port = RTL931X_CPU_PORT;
priv->port_mask = 0x3f;
priv->port_width = 2;
priv->fib_entries = 16384;
@ -1654,8 +1650,8 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
priv->n_mst = 128;
break;
}
priv->ds->num_ports = priv->cpu_port + 1;
priv->irq_mask = GENMASK_ULL(priv->cpu_port - 1, 0);
priv->ds->num_ports = priv->r->cpu_port + 1;
priv->irq_mask = GENMASK_ULL(priv->r->cpu_port - 1, 0);
err = rtl83xx_mdio_probe(priv);
if (err) {
@ -1687,7 +1683,7 @@ static int rtl83xx_sw_probe(struct platform_device *pdev)
* dsa_switch_tree, the tree is built when the switch
* is registered by dsa_register_switch
*/
for (int i = 0; i <= priv->cpu_port; i++)
for (int i = 0; i <= priv->r->cpu_port; i++)
priv->ports[i].dp = dsa_to_port(priv->ds, i);
/* Enable link and media change interrupts. Are the SERDES masks needed? */

6
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/debugfs.c
View File

@ -827,7 +827,7 @@ void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv)
(u32 *)(RTL838X_SW_BASE + RTL838X_MODEL_NAME_INFO));
/* Create one directory per port */
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy) {
ret = rtl838x_dbgfs_port_init(rtl838x_dir, priv, i);
if (ret)
@ -845,9 +845,9 @@ void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv)
port_ctrl_regset->regs = port_ctrl_regs;
port_ctrl_regset->nregs = ARRAY_SIZE(port_ctrl_regs);
port_ctrl_regset->base = (void *)(RTL838X_SW_BASE + (priv->cpu_port << 2));
port_ctrl_regset->base = (void *)(RTL838X_SW_BASE + (priv->r->cpu_port << 2));
debugfs_create_regset32("port_ctrl", 0400, port_dir, port_ctrl_regset);
debugfs_create_u8("id", 0444, port_dir, &priv->cpu_port);
debugfs_create_u8("id", 0444, port_dir, (u8 *)&priv->r->cpu_port);
/* Create entries for LAGs */
for (int i = 0; i < priv->ds->num_lag_ids; i++) {

72
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/dsa.c
View File

@ -49,7 +49,7 @@ static void rtldsa_enable_phy_polling(struct rtl838x_switch_priv *priv)
msleep(1000);
/* Enable all ports with a PHY, including the SFP-ports */
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy || priv->ports[i].pcs)
v |= BIT_ULL(i);
}
@ -130,26 +130,26 @@ static void rtldsa_vlan_setup(struct rtl838x_switch_priv *priv)
* egress VLAN(s) must therefore be a member of VLAN 0 to support
* CPU port as ingress when VLAN filtering is enabled.
*/
for (int i = 0; i <= priv->cpu_port; i++) {
for (int i = 0; i <= priv->r->cpu_port; i++) {
rtldsa_vlan_set_pvid(priv, i, 0);
info.member_ports |= BIT_ULL(i);
}
priv->r->vlan_set_tagged(0, &info);
/* Set forwarding action based on inner VLAN tag */
for (int i = 0; i < priv->cpu_port; i++)
for (int i = 0; i < priv->r->cpu_port; i++)
priv->r->vlan_fwd_on_inner(i, true);
}
static void rtldsa_setup_bpdu_traps(struct rtl838x_switch_priv *priv)
{
for (int i = 0; i < priv->cpu_port; i++)
for (int i = 0; i < priv->r->cpu_port; i++)
priv->r->set_receive_management_action(i, BPDU, TRAP2CPU);
}
static void rtldsa_setup_lldp_traps(struct rtl838x_switch_priv *priv)
{
for (int i = 0; i < priv->cpu_port; i++)
for (int i = 0; i < priv->r->cpu_port; i++)
priv->r->set_receive_management_action(i, LLDP, TRAP2CPU);
}
@ -174,24 +174,24 @@ static int rtldsa_83xx_setup(struct dsa_switch *ds)
for (int i = 0; i < ds->num_ports; i++)
priv->ports[i].enable = false;
priv->ports[priv->cpu_port].enable = true;
priv->ports[priv->r->cpu_port].enable = true;
/* Configure ports so they are disabled by default, but once enabled
* they will work in isolated mode (only traffic between port and CPU).
*/
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy || priv->ports[i].pcs) {
priv->ports[i].pm = BIT_ULL(priv->cpu_port);
priv->ports[i].pm = BIT_ULL(priv->r->cpu_port);
priv->r->traffic_set(i, BIT_ULL(i));
}
}
priv->r->traffic_set(priv->cpu_port, BIT_ULL(priv->cpu_port));
priv->r->traffic_set(priv->r->cpu_port, BIT_ULL(priv->r->cpu_port));
/* For standalone ports, forward packets even if a static fdb
* entry for the source address exists on another port.
*/
if (priv->r->set_static_move_action) {
for (int i = 0; i <= priv->cpu_port; i++)
for (int i = 0; i <= priv->r->cpu_port; i++)
priv->r->set_static_move_action(i, true);
}
@ -209,7 +209,7 @@ static int rtldsa_83xx_setup(struct dsa_switch *ds)
priv->r->l2_learning_setup();
rtldsa_port_set_salrn(priv, priv->cpu_port, false);
rtldsa_port_set_salrn(priv, priv->r->cpu_port, false);
ds->assisted_learning_on_cpu_port = true;
/* Make sure all frames sent to the switch's MAC are trapped to the CPU-port
@ -247,18 +247,18 @@ static int rtldsa_93xx_setup(struct dsa_switch *ds)
/* Disable all ports except CPU port */
for (int i = 0; i < ds->num_ports; i++)
priv->ports[i].enable = false;
priv->ports[priv->cpu_port].enable = true;
priv->ports[priv->r->cpu_port].enable = true;
/* Configure ports so they are disabled by default, but once enabled
* they will work in isolated mode (only traffic between port and CPU).
*/
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy || priv->ports[i].pcs) {
priv->ports[i].pm = BIT_ULL(priv->cpu_port);
priv->ports[i].pm = BIT_ULL(priv->r->cpu_port);
priv->r->traffic_set(i, BIT_ULL(i));
}
}
priv->r->traffic_set(priv->cpu_port, BIT_ULL(priv->cpu_port));
priv->r->traffic_set(priv->r->cpu_port, BIT_ULL(priv->r->cpu_port));
priv->r->print_matrix();
/* TODO: Initialize statistics */
@ -273,7 +273,7 @@ static int rtldsa_93xx_setup(struct dsa_switch *ds)
priv->r->l2_learning_setup();
rtldsa_port_set_salrn(priv, priv->cpu_port, false);
rtldsa_port_set_salrn(priv, priv->r->cpu_port, false);
ds->assisted_learning_on_cpu_port = true;
rtldsa_enable_phy_polling(priv);
@ -377,7 +377,7 @@ static void rtldsa_93xx_phylink_mac_config(struct phylink_config *config,
int port = dp->index;
/* Nothing to be done for the CPU-port */
if (port == priv->cpu_port)
if (port == priv->r->cpu_port)
return;
/* Disable MAC completely */
@ -775,7 +775,7 @@ static void rtldsa_poll_counters(struct work_struct *work)
struct rtl838x_switch_priv,
counters_work);
for (int port = 0; port < priv->cpu_port; port++) {
for (int port = 0; port < priv->r->cpu_port; port++) {
if (!priv->ports[port].phy && !priv->ports[port].pcs)
continue;
@ -792,7 +792,7 @@ static void rtldsa_init_counters(struct rtl838x_switch_priv *priv)
{
struct rtldsa_counter_state *counters;
for (int port = 0; port < priv->cpu_port; port++) {
for (int port = 0; port < priv->r->cpu_port; port++) {
if (!priv->ports[port].phy && !priv->ports[port].pcs)
continue;
@ -817,7 +817,7 @@ static void rtldsa_get_strings(struct dsa_switch *ds,
if (stringset != ETH_SS_STATS)
return;
if (port < 0 || port >= priv->cpu_port)
if (port < 0 || port >= priv->r->cpu_port)
return;
mib_desc = priv->r->mib_desc;
@ -833,7 +833,7 @@ static void rtldsa_get_ethtool_stats(struct dsa_switch *ds, int port,
const struct rtldsa_mib_desc *mib_desc;
const struct rtldsa_mib_item *mib_item;
if (port < 0 || port >= priv->cpu_port)
if (port < 0 || port >= priv->r->cpu_port)
return;
mib_desc = priv->r->mib_desc;
@ -850,7 +850,7 @@ static int rtldsa_get_sset_count(struct dsa_switch *ds, int port, int sset)
if (sset != ETH_SS_STATS)
return 0;
if (port < 0 || port >= priv->cpu_port)
if (port < 0 || port >= priv->r->cpu_port)
return 0;
return priv->r->mib_desc->list_count;
@ -862,7 +862,7 @@ static void rtldsa_get_eth_phy_stats(struct dsa_switch *ds, int port,
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
if (port < 0 || port >= priv->cpu_port)
if (port < 0 || port >= priv->r->cpu_port)
return;
rtldsa_counters_lock(priv, port);
@ -880,7 +880,7 @@ static void rtldsa_get_eth_mac_stats(struct dsa_switch *ds, int port,
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
if (port < 0 || port >= priv->cpu_port)
if (port < 0 || port >= priv->r->cpu_port)
return;
rtldsa_counters_lock(priv, port);
@ -926,7 +926,7 @@ static void rtldsa_get_eth_ctrl_stats(struct dsa_switch *ds, int port,
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
if (port < 0 || port >= priv->cpu_port)
if (port < 0 || port >= priv->r->cpu_port)
return;
rtldsa_counters_lock(priv, port);
@ -946,7 +946,7 @@ static void rtldsa_get_rmon_stats(struct dsa_switch *ds, int port,
const struct rtldsa_mib_desc *mib_desc;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
if (port < 0 || port >= priv->cpu_port)
if (port < 0 || port >= priv->r->cpu_port)
return;
mib_desc = priv->r->mib_desc;
@ -992,7 +992,7 @@ static void rtldsa_get_stats64(struct dsa_switch *ds, int port,
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
if (port < 0 || port >= priv->cpu_port)
if (port < 0 || port >= priv->r->cpu_port)
return;
if (priv->r->stat_update_counters_atomically)
@ -1010,7 +1010,7 @@ static void rtldsa_get_pause_stats(struct dsa_switch *ds, int port,
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
if (port < 0 || port >= priv->cpu_port)
if (port < 0 || port >= priv->r->cpu_port)
return;
rtldsa_counters_lock(priv, port);
@ -1078,7 +1078,7 @@ static int rtldsa_port_enable(struct dsa_switch *ds, int port, struct phy_device
return 0;
/* add port to switch mask of CPU_PORT */
priv->r->traffic_enable(priv->cpu_port, port);
priv->r->traffic_enable(priv->r->cpu_port, port);
/* add all other ports in the same bridge to switch mask of port */
priv->r->traffic_set(port, priv->ports[port].pm);
@ -1103,7 +1103,7 @@ static void rtldsa_port_disable(struct dsa_switch *ds, int port)
/* BUG: This does not work on RTL931X */
/* remove port from switch mask of CPU_PORT */
priv->r->traffic_disable(priv->cpu_port, port);
priv->r->traffic_disable(priv->r->cpu_port, port);
/* remove all other ports from switch mask of port */
priv->r->traffic_set(port, 0);
@ -1458,7 +1458,7 @@ static void rtldsa_port_xstp_state_set(struct rtl838x_switch_priv *priv, int por
int n = priv->port_width << 1;
/* Ports above or equal CPU port can never be configured */
if (port >= priv->cpu_port)
if (port >= priv->r->cpu_port)
return;
/* For the RTL839x and following, the bits are left-aligned, 838x and 930x
@ -1557,7 +1557,7 @@ static int rtldsa_vlan_filtering(struct dsa_switch *ds, int port,
* 2: Trap packet to CPU port
* The Egress filter used 1 bit per state (0: DISABLED, 1: ENABLED)
*/
if (port != priv->cpu_port) {
if (port != priv->r->cpu_port) {
priv->r->set_vlan_igr_filter(port, IGR_DROP);
priv->r->set_vlan_egr_filter(port, EGR_ENABLE);
} else {
@ -1567,7 +1567,7 @@ static int rtldsa_vlan_filtering(struct dsa_switch *ds, int port,
} else {
/* Disable ingress and egress filtering */
if (port != priv->cpu_port)
if (port != priv->r->cpu_port)
priv->r->set_vlan_igr_filter(port, IGR_FORWARD);
priv->r->set_vlan_egr_filter(port, EGR_DISABLE);
@ -1638,7 +1638,7 @@ static int rtldsa_vlan_add(struct dsa_switch *ds, int port,
* of now no such logic is in place. So for the CPU port keep the fixed
* PVID=0 from initial setup in place and ignore all subsequent settings.
*/
if (port != priv->cpu_port) {
if (port != priv->r->cpu_port) {
if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
rtldsa_vlan_set_pvid(priv, port, vlan->vid);
else if (priv->ports[port].pvid == vlan->vid)
@ -2421,7 +2421,7 @@ static int rtldsa_port_lag_join(struct dsa_switch *ds,
mutex_lock(&priv->reg_mutex);
if (port >= priv->cpu_port) {
if (port >= priv->r->cpu_port) {
err = -EINVAL;
goto out;
}
@ -2465,7 +2465,7 @@ static int rtldsa_port_lag_leave(struct dsa_switch *ds, int port,
goto out;
}
if (port >= priv->cpu_port) {
if (port >= priv->r->cpu_port) {
err = -EINVAL;
goto out;
}

12
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/qos.c
View File

@ -44,7 +44,7 @@ static void rtl839x_read_out_q_table(int port)
u32 rtl838x_get_egress_rate(struct rtl838x_switch_priv *priv, int port)
{
if (port > priv->cpu_port)
if (port > priv->r->cpu_port)
return 0;
return sw_r32(RTL838X_SCHED_P_EGR_RATE_CTRL(port)) & 0x3fff;
@ -55,7 +55,7 @@ int rtl838x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate
{
u32 old_rate;
if (port > priv->cpu_port)
if (port > priv->r->cpu_port)
return -1;
old_rate = sw_r32(RTL838X_SCHED_P_EGR_RATE_CTRL(port));
@ -70,7 +70,7 @@ u32 rtl839x_get_egress_rate(struct rtl838x_switch_priv *priv, int port)
u32 rate;
pr_debug("%s: Getting egress rate on port %d to %d\n", __func__, port, rate);
if (port >= priv->cpu_port)
if (port >= priv->r->cpu_port)
return 0;
mutex_lock(&priv->reg_mutex);
@ -92,7 +92,7 @@ int rtl839x_set_egress_rate(struct rtl838x_switch_priv *priv, int port, u32 rate
u32 old_rate;
pr_debug("%s: Setting egress rate on port %d to %d\n", __func__, port, rate);
if (port >= priv->cpu_port)
if (port >= priv->r->cpu_port)
return -1;
mutex_lock(&priv->reg_mutex);
@ -197,7 +197,7 @@ static void rtl839x_set_scheduling_algorithm(struct rtl838x_switch_priv *priv, i
mutex_lock(&priv->reg_mutex);
/* Check whether we need to empty the egress queue of that port due to Errata E0014503 */
if (sched == WEIGHTED_FAIR_QUEUE && t == WEIGHTED_ROUND_ROBIN && port != priv->cpu_port) {
if (sched == WEIGHTED_FAIR_QUEUE && t == WEIGHTED_ROUND_ROBIN && port != priv->r->cpu_port) {
/* Read Operations, Adminstatrion and Management control register */
oam_state = sw_r32(RTL839X_OAM_CTRL);
@ -231,7 +231,7 @@ static void rtl839x_set_scheduling_algorithm(struct rtl838x_switch_priv *priv, i
sw_w32_mask(BIT(19), sched ? BIT(19) : 0, RTL839X_TBL_ACCESS_DATA_2(8));
rtl839x_write_scheduling_table(port);
if (sched == WEIGHTED_FAIR_QUEUE && t == WEIGHTED_ROUND_ROBIN && port != priv->cpu_port) {
if (sched == WEIGHTED_FAIR_QUEUE && t == WEIGHTED_ROUND_ROBIN && port != priv->r->cpu_port) {
/* Restore OAM state to control register */
sw_w32(oam_state, RTL839X_OAM_CTRL);

5
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.c
View File

@ -737,7 +737,7 @@ static void rtl838x_init_eee(struct rtl838x_switch_priv *priv, bool enable)
sw_w32(0x5001417, RTL838X_EEE_TX_TIMER_GELITE_CTRL);
/* Enable EEE MAC support on ports */
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy)
priv->r->set_mac_eee(priv, i, enable);
}
@ -1576,7 +1576,7 @@ static void rtl838x_pie_init(struct rtl838x_switch_priv *priv)
mutex_init(&priv->pie_mutex);
/* Enable ACL lookup on all ports, including CPU_PORT */
for (int i = 0; i <= priv->cpu_port; i++)
for (int i = 0; i <= priv->r->cpu_port; i++)
sw_w32(1, RTL838X_ACL_PORT_LOOKUP_CTRL(i));
/* Power on all PIE blocks */
@ -1807,6 +1807,7 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group,
struct netdev_lag_upper_info *info);
const struct rtldsa_config rtldsa_838x_cfg = {
.cpu_port = RTL838X_CPU_PORT,
.mask_port_reg_be = rtl838x_mask_port_reg,
.set_port_reg_be = rtl838x_set_port_reg,
.get_port_reg_be = rtl838x_get_port_reg,

2
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl838x.h
View File

@ -1412,6 +1412,7 @@ struct rtldsa_config {
int imr_glb;
int n_counters;
int n_pie_blocks;
u8 cpu_port;
u8 port_ignore;
int trk_ctrl;
int trk_hash_ctrl;
@ -1515,7 +1516,6 @@ struct rtl838x_switch_priv {
int mirror_group_ports[4];
struct mii_bus *parent_bus;
const struct rtldsa_config *r;
u8 cpu_port;
u8 port_mask;
u8 port_width;
u64 irq_mask;

7
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl839x.c
View File

@ -787,7 +787,7 @@ static void rtl839x_init_eee(struct rtl838x_switch_priv *priv, bool enable)
sw_w32_mask(0xff << 20, 0x11 << 20, RTL839X_EEE_TX_TIMER_10G_CTRL);
/* Setup EEE on all ports */
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy)
priv->r->set_mac_eee(priv, i, enable);
}
@ -1592,8 +1592,8 @@ static void rtl839x_setup_port_macs(struct rtl838x_switch_priv *priv)
struct net_device *dev;
u64 mac;
pr_debug("%s: got port %08x\n", __func__, (u32)priv->ports[priv->cpu_port].dp);
dev = priv->ports[priv->cpu_port].dp->user;
pr_debug("%s: got port %08x\n", __func__, (u32)priv->ports[priv->r->cpu_port].dp);
dev = priv->ports[priv->r->cpu_port].dp->user;
mac = ether_addr_to_u64(dev->dev_addr);
for (int i = 0; i < 15; i++) {
@ -1722,6 +1722,7 @@ int rtldsa_83xx_lag_setup_algomask(struct rtl838x_switch_priv *priv, int group,
struct netdev_lag_upper_info *info);
const struct rtldsa_config rtldsa_839x_cfg = {
.cpu_port = RTL839X_CPU_PORT,
.mask_port_reg_be = rtl839x_mask_port_reg_be,
.set_port_reg_be = rtl839x_set_port_reg_be,
.get_port_reg_be = rtl839x_get_port_reg_be,

7
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl930x.c
View File

@ -1187,7 +1187,7 @@ static void rtl930x_init_eee(struct rtl838x_switch_priv *priv, bool enable)
pr_debug("Setting up EEE, state: %d\n", enable);
/* Setup EEE on all ports */
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy)
priv->r->set_mac_eee(priv, i, enable);
}
@ -2245,7 +2245,7 @@ static void rtl930x_pie_init(struct rtl838x_switch_priv *priv)
pr_debug("%s\n", __func__);
/* Enable ACL lookup on all ports, including CPU_PORT */
for (int i = 0; i <= priv->cpu_port; i++)
for (int i = 0; i <= priv->r->cpu_port; i++)
sw_w32(1, RTL930X_ACL_PORT_LOOKUP_CTRL(i));
/* Include IPG in metering */
@ -2679,7 +2679,7 @@ static void rtl930x_led_init(struct rtl838x_switch_priv *priv)
rtldsa_930x_led_get_forced(node, leds_in_set, forced_leds_per_port);
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
int pos = (i << 1) % 32;
u32 set;
@ -2793,6 +2793,7 @@ static void rtldsa_930x_qos_init(struct rtl838x_switch_priv *priv)
}
const struct rtldsa_config rtldsa_930x_cfg = {
.cpu_port = RTL930X_CPU_PORT,
.mask_port_reg_be = rtl838x_mask_port_reg,
.set_port_reg_be = rtl838x_set_port_reg,
.get_port_reg_be = rtl838x_get_port_reg,

5
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/rtl931x.c
View File

@ -1490,7 +1490,7 @@ static void rtl931x_pie_init(struct rtl838x_switch_priv *priv)
pr_debug("%s\n", __func__);
/* Enable ACL lookup on all ports, including CPU_PORT */
for (int i = 0; i <= priv->cpu_port; i++)
for (int i = 0; i <= priv->r->cpu_port; i++)
sw_w32(1, RTL931X_ACL_PORT_LOOKUP_CTRL(i));
/* Include IPG in metering */
@ -1670,7 +1670,7 @@ static void rtldsa_931x_led_init(struct rtl838x_switch_priv *priv)
rtldsa_931x_led_get_forced(node, leds_in_set, forced_leds_per_port);
for (int i = 0; i < priv->cpu_port; i++) {
for (int i = 0; i < priv->r->cpu_port; i++) {
int pos = (i << 1) % 32;
u32 set;
@ -1934,6 +1934,7 @@ static void rtldsa_931x_qos_init(struct rtl838x_switch_priv *priv)
}
const struct rtldsa_config rtldsa_931x_cfg = {
.cpu_port = RTL931X_CPU_PORT,
.mask_port_reg_be = rtl839x_mask_port_reg_be,
.set_port_reg_be = rtl839x_set_port_reg_be,
.get_port_reg_be = rtl839x_get_port_reg_be,

2
target/linux/realtek/files-6.18/drivers/net/dsa/rtl83xx/tc.c
View File

@ -159,7 +159,7 @@ static int rtl83xx_add_flow(struct rtl838x_switch_priv *priv, struct flow_cls_of
case FLOW_ACTION_TRAP:
pr_debug("%s: TRAP\n", __func__);
flow->rule.fwd_data = priv->cpu_port;
flow->rule.fwd_data = priv->r->cpu_port;
flow->rule.fwd_act = PIE_ACT_REDIRECT_TO_PORT;
rtl83xx_flow_bypass_all(flow);
break;