93333 Commits

Author SHA1 Message Date
Jonas Karlman
eaeaf04a3d rockchip: pine64: rockpro64: Migrate to use IO-domain driver
Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 18:19:28 +08:00
Jonas Karlman
626dbdd512 rockchip: io-domain: Add support for RK3399
Port the RK3399 part of the Rockchip IO-domain driver from linux.

This differs from linux version in that pmu io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supply that have been configured.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 18:19:27 +08:00
Jonas Karlman
b65850509c board: rockchip: Add a common ROCK Pi 4 target
Move ROCK Pi 4 specific board code from the shared evb_rk3399 target
into its own board target and update related defconfigs to use the new
TARGET_ROCKPI4_RK3399 option.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2024-03-14 18:19:27 +08:00
Jonas Karlman
4b6e00454f board: rockchip: rk3399: Remove unused board_early_init_f functions
These functions is excluded from SPL build and BOARD_EARLY_INIT_F is not
enabled for any of the affected boards, so this legacy code is not used.

Rockchip common board code already enable all regulators flagged as
always-on or boot-on in device tree, and fixed/gpio regulators now have
basic reference counting support so the original intent of this code is
no longer valid.

Remove the unneeded and unused code that used to enable usb regulators.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 18:19:27 +08:00
Jonas Karlman
053c813926 board: rockchip: rk3399: Add myself as reviewer to MAINTAINERS
Add myself as a reviewer for RK3399 boards that I have and can help with
review and testing of defconfig and device tree changes.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 18:19:27 +08:00
Jonas Karlman
710d7f27e2 board: rockchip: rk3399: Add device tree files to MAINTAINERS
Update MAINTAINERS files for RK3399 boards to include related device
tree files. Also correct a few filenames.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 18:19:27 +08:00
Jonas Karlman
1bc4e8eb1d rockchip: Migrate to use DM_USB_GADGET on RK3328
USB gadget is not working fully as expected on RK3328, it uses a
board_usb_init() function to initialize the DWC2 OTG port.

The board_usb_init() function does not intgrate with the generic phy
framework and as a result the USB phy is not properly configured before
or after USB gadget use.

Having both USB_DWC2 and DWC2_OTG enabled for the same board is also
causing some issues.

Trying to use rockusb or ums command after usb stop result in a freeze
due to usb stop is putting the phy in a suspended state.

  => usb start
  => usb stop
  => ums 0 mmc 0
  --> freeze due to usb phy is suspended <--

Fix this by only using one of USB_DWC2 (host) or DWC2_OTG (peripheral)
depending on the most likely usage of the otg port and by migrating to
use DM_USB_GADGET instead of a board_usb_init() function.

The nanopi-r2 and orangepi-r1-plus variants share OTG and power using a
Type-C connector, mark these boards dr_mode as peripheral, the most
likely usage is for recovery and image download.

The rock64 and roc-cc currently use dr_mode as host, remove the DWC2_OTG
driver from these boards to ensure that the USB_DWC2 driver is used.

The rock-pi-e board does not enable the usb20_otg node so both USB_DWC2
and DWC2_OTG is removed from this board.

Enable RockUSB and UMS on all boards with a otg port in peripheral mode.

Also with the migration to DM_USB_GADGET completed the U-Boot specific
change to reorder usb nodes in the soc device tree can be reverted.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 18:19:27 +08:00
Jonas Karlman
2b6a013caf rockchip: board: Use a common USB Product ID for UMS
Change to use the common Product ID 0x0010 when the ums command is used.

This matches downstream vendor U-Boot and is a Product ID that tools
such as rkdeveloptool and RKDevTool will identify as MSC mode.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 18:19:27 +08:00
Jonas Karlman
06fac9dd14 rockchip: board: Prepare for use of DM_USB_GADGET with DWC2_OTG
The board_usb_init() and board_usb_cleanup() functions is always
included when USB_GADGET and USB_GADGET_DWC2_OTG is enabled.

Prepare for a change to use DM_USB_GADGET with DWC2_OTG by adding an
extra ifdef condition. The extra separate ifdef for USB_GADGET prepare
for next patch that adds a g_dnl_bind_fixup() function.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 18:19:27 +08:00
Jonas Karlman
8c19275fdb rockchip: Update the default USB Product ID value
RK3036 is using the USB product id normally used by RK3066B, and RK3328
is using the product id normally used by RK3368.

Fix this and update the default USB_GADGET_PRODUCT_NUM Kconfig option
for remaining supported Rockchip SoCs to match the product id used in
Maskrom mode.

Also remove a reference to an undefined ROCKCHIP_RK3229 Kconfig symbol.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2024-03-14 18:19:27 +08:00
Jonas Karlman
b0cadb35da rockchip: Use common bss and stack addresses on RK3588
Currently the following memory layout is typically used on RK3588:
[    0, 256K) - SPL binary
[ 256K,   2M) - TF-A / reserved
[   -X,   4M) - SPL pre-reloc stack (SPL_STACK)
[ 3.5M,   4M)   - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[   -X,   6M) - SPL reloc stack (SPL_STACK_R_ADDR)
[   5M,   6M)   - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
[  10M,   +X) - U-Boot proper binary (TEXT_BASE)
[   -X,  12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[11.5M,  12M)   - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[  64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)

SPL can safely load U-Boot proper + FDT to [10M, 11.5M) with this layout.

However, on ROCK 5A the SPL stacks is overlapping:
[   -X,  16M) - SPL pre-reloc stack (SPL_STACK)
[15.5M,  16M)   - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[   -X,  16M) - SPL reloc stack (SPL_STACK_R_ADDR)
[  15M,  16M)   - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)

Because bind and probe udevice instanses is allocated on the pre-reloc
malloc heap, there is going to be an overlap when reloc malloc heap
reaches close to 512 KiB of usage.

Migrate to use common bss, stack and malloc heap size and addresses to
mitigate these limitations and allow for a larger U-Boot proper size.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Update for new boards defconfig)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:30:16 +08:00
Jonas Karlman
8a94c376f6 rockchip: Use common bss and stack addresses on RK356x
Currently the following memory layout is typically used on RK356x:
[    0, 256K) - SPL binary
[ 256K,   2M) - TF-A / reserved
[   -X,   4M) - SPL pre-reloc stack (SPL_STACK)
[-128K,   4M)   - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[   -X,   6M) - SPL reloc stack (SPL_STACK_R_ADDR)
[   5M,   6M)   - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
[  10M,   +X) - U-Boot proper binary (TEXT_BASE)
[   -X,  12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[-128K,  12M)   - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[  64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)

SPL can safely load U-Boot proper + FDT to [10M, 12M-128K) with this
layout.

Migrate to use common bss, stack and malloc heap size and addresses to
remove this size limitation.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Update for pinetab2-rk3566_defconfig)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:28:09 +08:00
Jonas Karlman
5e7cd8a119 rockchip: Use common bss and stack addresses on RK3399
With the stack and text base used by U-Boot SPL and proper on RK3399
there is a high likelihood of overlapping when U-Boot proper + FDT nears
or exceeded 1 MiB in size.

Currently the following memory layout is typically used on RK3399:
[    0, 256K) - SPL binary
[ 256K,   2M) - TF-A / reserved
[   2M,   +X) - U-Boot proper binary (TEXT_BASE)
[   -X,   3M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[ -16K,   3M)   - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[   -X,   4M) - SPL pre-reloc stack (SPL_STACK)
[ -16K,   4M)   - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[   4M,  +8K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)
[   -X,  64M) - SPL reloc stack (SPL_STACK_R_ADDR)
[  63M,  64M)   - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)

SPL can safely load U-Boot proper + FDT to [2M, 4M-16K) with this layout.
However, the stack at [-X, 3M) used during U-Boot proper pre-reloc is
restricting the safe size of U-Boot proper + FDT to be less than 1 MiB.

Migrate to use common bss, stack and malloc heap size and addresses to
fix this restriction and allow for a larger U-Boot proper image size.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:27:29 +08:00
Jonas Karlman
f01a399203 rockchip: Use common bss and stack addresses on RK3328
With the stack and text base used by U-Boot SPL and proper on RK3328
there is a high likelihood of overlapping when U-Boot proper + FDT nears
or exceeded 1 MiB in size.

Currently the following memory layout is typically used on RK3328:
[    0, 256K) - SPL binary
[ 256K,   2M) - TF-A / reserved
[   2M,   +X) - U-Boot proper binary (TEXT_BASE)
[   -X,   3M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[  -8K,   3M)   - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[   -X,   4M) - SPL pre-reloc stack (SPL_STACK)
[  -8K,   4M)   - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[   -X,   6M) - SPL reloc stack (SPL_STACK_R_ADDR)
[   5M,   6M)   - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)
[  32M,  +8K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)

SPL can safely load U-Boot proper + FDT to [2M, 4M-8K) with this layout.
However, the stack at [-X, 3M) used during U-Boot proper pre-reloc is
restricting the safe size of U-Boot proper + FDT to be less than 1 MiB.

Migrate to use common bss, stack and malloc heap size and addresses to
fix this restriction and allow for a larger U-Boot proper image size.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:27:28 +08:00
Jonas Karlman
41098d2e3e rockchip: Use common bss and stack addresses on RK3308
Currently the following memory layout is typically used on RK3308:
[    0, 256K) - SPL binary
[ 256K,   2M) - TF-A / reserved
[   -X,   4M) - SPL pre-reloc stack (SPL_STACK)
[  -8K,   4M)   - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN)
[   4M,  +8K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE)
[   6M,   +X) - U-Boot proper binary (TEXT_BASE)
[   -X,   8M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR)
[  -8K,   8M)   - pre-reloc malloc heap (SYS_MALLOC_F_LEN)
[   -X,  12M) - SPL reloc stack (SPL_STACK_R_ADDR)
[  11M,  12M)   - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN)

SPL can safely load U-Boot proper + FDT to [6M, 8M-8K) with this layout.

Migrate to use common bss, stack and malloc heap size and addresses to
remove this size limitation and extend the malloc heap size being used.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:27:28 +08:00
Jonas Karlman
008ba0d56d rockchip: Add common default bss and stack addresses
On Rockchip the typical aarch64 boot steps are as follows:
- BROM load TPL to SRAM
- TPL init full DRAM
  - use stack in SRAM at TPL_STACK addr
  - use malloc heap on stack, size is TPL_SYS_MALLOC_F_LEN
- TPL jump back to BROM
- BROM load SPL to beginning of DRAM
- SPL init storage devices
  - use bss in DRAM at SPL_BSS_START_ADDR, size is SPL_BSS_MAX_SIZE
  - use stack in DRAM at SPL_STACK addr (or CUSTOM_SYS_INIT_SP_ADDR)
  - use malloc heap on stack, size is SPL_SYS_MALLOC_F_LEN
- SPL load FIT images from storage to DRAM
  - use stack in DRAM at SPL_STACK_R_ADDR
  - use new malloc heap on stack, size is SPL_STACK_R_MALLOC_SIMPLE_LEN
- SPL jump to TF-A at 0x40000
- (optional) TF-A load OPTEE
- TF-A jump to U-Boot proper at TEXT_BASE
- U-Boot proper init pre-reloc devices
  - use stack in DRAM at CUSTOM_SYS_INIT_SP_ADDR
  - use malloc heap on stack, size is SYS_MALLOC_F_LEN
- U-Boot proper relocate to end of usable DRAM
- U-Boot proper init devices and complete boot

SPL have access to full DRAM, however, current configuration for text
base, stack addr and malloc heap size used at the different boot steps
are at risk of overlapping, e.g. when U-Boot proper + FDT grows close
to 1 MiB on RK3328/RK3399 or when pre-reloc and reloc stack and malloc
heap overlap on ROCK 5A.

Fix this by defining safe defaults for bss, stack and malloc size and
addresses. A range at around [60 MiB, 64 MiB) was chosen to be used for
bss and stack until U-Boot proper have been relocated to end of usable
DRAM. The range was primarily chosen to be able to accommodate SoCs with
a small amount of embedded DRAM, e.g. RK3308G has 64 MiB DRAM.

Overiew of the new common memory layout:
[    0,   2M) - SPL / TF-A / reserved
[   2M,   +X) - U-Boot proper pre-reloc
[   -X,  64M) - bss, stack and malloc heap

During SPL pre-reloc phase:
[    0,	256K) - SPL binary is loaded by BROM to beginning of DRAM
[   -X,	 63M) - SPL pre-reloc stack
[ -32K,	 63M)   - SPL pre-reloc malloc heap
[63.5M,	+32K) - SPL bss

After SPL reloc phase:
[    0,	256K) - SPL binary
[ 256K,	  +X) - TF-A image is loaded by SPL
[   2M,	  +X) - U-Boot proper + FDT image is loaded by SPL
[   -X,	 62M) - SPL reloc stack
[  60M,	 62M)   - SPL reloc malloc heap
[ -32K,	 63M) - SPL init malloc heap, memory allocated during SPL
                pre-reloc phase is still in use at reloc phase
[63.5M,	+32K) - SPL bss

During U-Boot proper pre-reloc phase:
[    0,   2M) - TF-A / reserved
[   2M,   +X) - U-Boot proper + FDT
[   -X,  63M) - U-Boot proper pre-reloc stack (shared addr with SPL)
[ -64K,  63M)   - U-Boot proper pre-reloc malloc heap

After U-Boot proper has relocated to top of memory we should be able to
use 2M+ for loading kernel, initrd, scripts etc.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:27:28 +08:00
Jonas Karlman
c60958d44e board: rockchip: Add Pine64 PineTab2
The Pine64 PineTab2 is a tablet computer based on the Rockchip RK3566
SoC. The table features 4/8 GB LPDDR4 RAM and 64/128 GB eMMC storage.

Features tested on a Pine64 PineTab2 8GB v2.0:
- SD-card boot
- eMMC boot
- SPI Flash boot
- USB host

Device tree is imported from linux maintainer branch v6.9-armsoc/dts64,
commit 1b7e19448f8f ("arm64: dts: rockchip: Add devicetree for Pine64
PineTab2").

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:27:28 +08:00
Jonas Karlman
b54c3d0dd6 rockchip: board: Add minimal generic RK3588S/RK3588 board
Add a minimal generic RK3588S/RK3588 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3588S/RK3588 boards that follow reference board design.

Also fix the alphabetical order of RK3588 boards listed in Makefile and
documentation.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2024-03-14 15:27:28 +08:00
Elon Zhang
9fdd9a5469 board: rockchip: add Rockchip Toybrick TB-RK3588X board
TB-RK3588X board is a Rockchip Toybrick RK3588 based development board.

Specification:
	Rockchip Rk3588 SoC
	4x ARM Cortex-A76, 4x ARM Cortex-A55
	8/16GB Memory LPDDR4x
	Mali G610MC4 GPU
	2× MIPI-CSI0 Connector
	1x 2Lanes PCIe3.0 Connector
	1x SATA3.0 Connector
	32GB eMMC Module
	2x USB 2.0, 2x USB 3.0
	1x HDMI Output, 1x HDMI Input
	2x Ethernet Port

Functions work normally:
	[1] USB2.0 Host
	[2] Ethernet0 with PHY RTL8211F

More information can be obtained from the following websites:
	[1] https://t.rock-chips.com/en/wiki/EN/tb-rk3588x_en/index.html
	[2] http://t.rock-chips.com/

Kernel commits:
	8ffe365f8dc7 ("arm64: dts: rockchip: Add devicetree support for TB-RK3588X board")
	7140387ff49d ("dt-bindings: arm: rockchip: Add Toybrick TB-RK3588X")

Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com>
Signed-off-by: Elon Zhang <zhangzj@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 15:27:28 +08:00
Jonas Karlman
b055c8952c phy: rockchip-inno-usb2: Limit changes made to regs
The USB2PHY regs already contain working default reset values for RK3328
and RK35xx as evidenced by the fact that this driver never has changed a
single value for these SoCs.

Reduce to only configure utmi_suspend_n and utmi_sel bits similar to
what is currently done on RK3399. Also add missing clkout_ctl for RK3588.

When enabled utmi_suspend_n is changed to normal mode and utmi_sel to
use otg/host controller utmi interface to phy. When disabled
utmi_suspend_n is changed to suspend mode and utmi_sel to use GRF utmi
interface to phy.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2024-03-14 11:48:40 +08:00
Jonas Karlman
803fbdfd1c phy: rockchip-inno-usb2: Write to correct GRF
On RK3399 the USB2PHY regs are located in the common GRF, remaining SoCs
that is supported by this driver have the USB2PHY regs in a different
GRF.

When support for RK356x, RK3588 and RK3328 was added this driver was
never updated to use correct GRF and have instead incorrectly written
to wrong GRF for these SoCs.

The default reset values for the USB2PHY have made USB mostly working
even when wrong GRF was used, however, following have been observed:

  scanning bus usb@fd840000 for devices...
  ERROR:  USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did
  not provide a handshake (OUT) (5)
  ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN) or did
  not provide a handshake (OUT) (5)
  unable to get device descriptor (error=-1)

Fix this by using a regmap from rockchip,usbgrf prop and fall back to
getting a regmap for parent udevice instead of always getting the
common GRF.

Also protect against accidental clear of bit 0 in a reg with offset 0,
only bind driver to enabled otg/host-ports and remove unused headers.

Fixes: 3da15f0b49a2 ("phy: rockchip-inno-usb2: Add USB2 PHY for rk3568")
Fixes: cdf9010f6e17 ("phy: rockchip-inno-usb2: add initial support for rk3588 PHY")
Fixes: 9aa93d84038b ("phy: rockchip-inno-usb2: Add USB2 PHY for RK3328")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:48:40 +08:00
Jonas Karlman
6d8cdfd153 rockchip: spl: Enable caches to speed up checksum validation
FIT checksum validation is very slow in SPL due to D-cache not being
enabled.

Enable caches in SPL on ARM64 SoCs to speed up FIT checksum validation,
from seconds to milliseconds.

This change enables caches in SPL on all Rockchip ARM64 boards, the
Kconfig options SPL_SYS_ICACHE_OFF and SPL_SYS_DCACHE_OFF can be used to
disable caches for a specific board or SoC if needed.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:48:40 +08:00
Andy Yan
3e15dee38d board: rockchip: Add support for rk3588 based Cool Pi CM5 EVB
Cool Pi CM5 EVB works as a mother board connect with CM5.

CM5 Specification:
- Rockchip RK3588
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet x 1 with PHY YT8531
- Gigabit ethernet x 1 drived by PCIE with YT6801S

CM5 EVB Specification:
- HDMI Type A out x 2
- HDMI Type D in x 1
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- 40 pin header

The dts is from linux-6.8 rc1.

Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

[0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
2024-03-14 11:48:40 +08:00
Andy Yan
341f13e469 board: rockchip: Add support for rk3588s based Cool Pi 4B
CoolPi 4B is a rk3588s based SBC.

Specification:
- Rockchip RK3588S
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- SPI Nor 8MB
- Gigabit ethernet drived by PCIE with RTL8111HS
- HDMI Type D out
- Mini DP out
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- WIFI/BT module AIC8800
- 40 pin header

The dts is from linux-6.8 rc1.

Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[0]https://patchwork.kernel.org/project/linux-rockchip/patch/2450634.jE0xQCEvom@phil/
2024-03-14 11:48:40 +08:00
Chen-Yu Tsai
e8fe7c2542 rockchip: nanopi-r4s: Drop ROCKCHIP_OTP
The NanoPi R4S has an RK3399 SoC, which has efuse supported by
ROCKCHIP_EFUSE, not ROCKCHIP_OTP.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-03-14 11:48:40 +08:00
Chen-Yu Tsai
701ed2feb6 rockchip: rk3399: regenerate defconfigs
Regenerate RK3399 defconfigs after adding imply statements.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-14 11:48:40 +08:00
Chen-Yu Tsai
19b4caf321 rockchip: rk3328: regenerate defconfigs
Regenerate RK3328 defconfigs after adding imply statements.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-03-14 11:48:40 +08:00
Chen-Yu Tsai
3cd617ff07 rockchip: rk3399: Read cpuid and generate MAC address from efuse
The rockchip-efuse driver supports the efuse found on RK3399. This
hardware block is part of the SoC and contains the CPUID, which can
be used to generate stable serial numbers and MAC addresses.

Enable the driver and reading cpuid by default for RK3399.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-03-14 11:40:49 +08:00
Chen-Yu Tsai
7d4c773e66 rockchip: rk3328: Read cpuid and generate MAC address from efuse
The rockchip-efuse driver supports the efuse found on RK3328. This
hardware block is part of the SoC and contains the CPUID, which can
be used to generate stable serial numbers and MAC addresses.

Enable the driver and reading cpuid by default for RK3328.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-03-14 11:40:49 +08:00
Jonas Karlman
aa321d49f7 rockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash
Add Kconfig options to enable support for booting from SPI NOR flash on
Orange Pi R1 Plus boards.

The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
boards.

  => sf probe
  SF: Detected zb25vq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB

  => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
  1376768 bytes read in 66 ms (19.9 MiB/s)

  => sf update ${fileaddr} 0 ${filesize}
  device 0 offset 0x0, size 0x150200
  1126912 bytes written, 249856 bytes skipped in 14.22s, speed 100542 B/s

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
a37a3ddd51 rockchip: rk3328-rock64: Enable boot from SPI NOR flash
Add Kconfig options to enable support for booting from SPI NOR flash on
Pine64 Rock64.

The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
boards.

  => sf probe
  SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB

  => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
  1359872 bytes read in 65 ms (20 MiB/s)

  => sf update ${fileaddr} 0 ${filesize}
  device 0 offset 0x0, size 0x14c000
  1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516 B/s

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
c60b835be2 rockchip: rk3328: Add support to build bootable SPI image
Similar to RK35xx the BootRom in RK3328 can read all data and look for
idbloader at 0x8000, same as it does for SD and eMMC.

Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
2f440ffb1d Revert "rockchip: Allow booting from SPI"
This reverts commit 3523c07867b403d5b3b68812aebac8a5afa5be4c.

Booting from SPI was already allowed before this commit was first
introduced. A few lines further down the exact same code already existed
and still does.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
9b67e6007c rockchip: rk3328: Sync device tree from linux v6.8-rc1
Sync rk3328 device tree from linux v6.8-rc1.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
1bc79dce57 rng: rockchip: Use same compatible as linux
Replace the rockchip,cryptov1-rng compatible with compatibles used in
the linux device tree for RK3288, RK3328 and RK3399 to ease sync of SoC
device tree from linux.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
f41738d0f1 gpio: rockchip: Use gpio alias id as gpio bank id
The U-Boot driver try to base the gpio bank id on the gpio-ranges prop
and fall back to base the bank id on the node name. However, the linux
driver try to base the bank id on the gpio alias id and fall back on
node order.

This can cause issues when SoC DT is synced from linux and gpioX@ nodes
has been renamed to gpio@ and gpio-ranges or a SoC specific alias has
not been assigned.

Try to use the gpio alias id as first fallback when a gpio-ranges prop
is missing to ease sync of updated SoC DT. Keep the current fallback on
node name as a third fallback to not affect any existing unsynced DT.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
1e21f56930 rockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC
When RK3328 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there is a fallback to
read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card will fail:

  U-Boot SPL 2024.04-rc1 (Feb 05 2024 - 22:18:22 +0000)
  Trying to boot from MMC1
  mmc_load_image_raw_sector: mmc block read error
  Trying to boot from MMC2
  Card did not respond to voltage select! : -110
  spl: mmc init failed with error: -95
  Trying to boot from MMC1
  mmc_load_image_raw_sector: mmc block read error
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph
props. Also sort and move common nodes shared by all boards to the SoC
u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
f652b25fee rockchip: rk3328-orangepi-r1-plus: Update defconfig
Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove
&gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y
to ensure device tree props is used by motorcomm PHY driver.

Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree files to MAINTAINERS file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
55ecc23cf9 rockchip: rk3328-nanopi-r2: Update defconfig
Update defconfig for rk3328-nanopi-r2* boards with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_GIGE=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove
&gmac2io to support reset of onboard ethernet PHYs. Also add DM_MDIO=y
to ensure device tree props is used by motorcomm PHY driver.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add DM_REGULATOR_GPIO=y and SPL_DM_REGULATOR_GPIO=y to support the
regulator-gpio compatible.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree files to MAINTAINERS file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
1376592f40 rockchip: rk3328-rock-pi-e: Update defconfig
Update defconfig for rk3328-rock-pi-e with new defaults.

Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_MDIO=y to ensure device tree props can be used by PHY driver.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add myself as a reviewer for this board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
c5074c90b0 rockchip: rk3328-roc-cc: Update defconfig
Update defconfig for rk3328-roc-cc with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.

Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
51ee38dd67 rockchip: rk3328-rock64: Update defconfig
Update defconfig for rk3328-rock64 with new defaults.

Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Remove SPL_I2C=y and SPL_PMIC_RK8XX=y, the related i2c and pmic nodes is
not included in the SPL fdt.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands. Also add CMD_POWEROFF=y to be able to use the poweroff command.

Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set
based on cpuid read from eFUSE.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Also add missing device tree file to MAINTAINERS and add myself as a
reviewer for this board.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:48 +08:00
Jonas Karlman
93cc018ca8 rockchip: rk3328-evb: Update defconfig
Update defconfig for rk3328-evb with new defaults.

Add DM_RESET=y to support using reset signals.

Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.

Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.

Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.

Add MISC_INIT_R=y, ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y,
ethaddr and eth1addr is set based on cpuid read from eFUSE.

Remove pinctrl-0 and pinctrl-names from CONFIG_OF_SPL_REMOVE_PROPS,
SPL need to configure pinctrl for e.g. SD-card.

Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.

Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.

Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.

Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.

Add SYSINFO=y to support the sysinfo uclass.

Also add missing device tree files to MAINTAINERS and remove the
obsolete README file.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:47 +08:00
Jonas Karlman
d958801dda rockchip: rk3328: Update default u-boot, spl-boot-order prop
Change to use a common FIT load order, same-as-spl > SD-card > eMMC on
RK3328 boards. Only EVB and Radxa ROCK Pi E is affected by this change.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-14 11:40:47 +08:00
Tom Rini
86fd291a79 Pull request efi-2024-04-rc5
Documentation:
 
 * fix Python string escapes
 * develop: commands: Fix function prototype
 * fix incorrect path Documentation
 * fix mistyped "env flags" command
 * board: phytec: phycore-am62x: Update artifact names
 
 UEFI:
 
 * Invoke ft_board_setup() before efi_carve_out_dt_rsv()
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEK7wKXt3/btL6/yA+hO4vgnE3U0sFAmXyQU0ACgkQhO4vgnE3
 U0v5Ww/+LFusLohjO6aIE65NsMvEFUMXIZe2Ll6jBOXV+T8/foDnsRsFaeVx1GL5
 lJOjnlHSED3/Q3JIhL8KWn35CovykhLxsWkqdmvssXPuZH1k9Q2OZnyBnYcYJMJA
 kguEvpF6ynf70JGPK8w/GgNzqf2qzKe6SYTdgWKQeYO3mhcQT7pGvFXWK0qDVG47
 HKGY+g2vXD0GQxzeeIiVr1ZAQUu+FmXeiPDEIQ4tKki7HEoFvuj5rCldZEIelzHF
 LXGZ9nlHAOHK+7USkL+3vMs7VOvxndXi77maW8i0Dcn8bFcBP3/pJcduoNBZHHBS
 vnILeKux63FuhIxnHOGBP3OoxbW8RsZhn5C6+K/IMpKWzFw6Y577ZSp+dNKp9Gpc
 3P3HFTzXVQX6j7MqvsnMNCOHvGJ3ZFUJFsXx2r6bfKX8VcxMCbFbJg/fNu102f4y
 WCwWtgNmW4EuOHUupEfSnOLSZhRT1gliom5wcvTdt0ML9Z7mP9bYz+LkT+/P2WMA
 oEeppMo0+MSlbhoXX11UT8/hJD4n/tB85yrmUkuq2K3u+YRw0hy+3WpOT/62u9CC
 320HEX6XKrD8mvNM1XpWtylVo8KQNws0FBfWIrCwpDE52sKfHqlIVu95g3ZqyEOl
 bHFLQocagoCO8Pzdllm9N1rfTAGL84h2w2C4kmQTCUrzYvAkl6s=
 =QKo8
 -----END PGP SIGNATURE-----

Merge tag 'efi-2024-04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2024-04-rc5

Documentation:

* fix Python string escapes
* develop: commands: Fix function prototype
* fix incorrect path Documentation
* fix mistyped "env flags" command
* board: phytec: phycore-am62x: Update artifact names

UEFI:

* Invoke ft_board_setup() before efi_carve_out_dt_rsv()
2024-03-13 20:39:46 -04:00
Tom Rini
3987e15e88 Merge branch '2024-04-13-assorted-fixes' into next
- Fix bootm_low handling, CONFIG_64BIT usage fixes, RNG fixes, cli
  history fixes, allow bootelf to pass a device tree address, other
  assorted fixes.
2024-03-13 18:47:16 -04:00
Tom Rini
969ea37dfd stv0991: Remove stv0991 board and architecture code
This architecture and related board are unmaintained currently and have
been for a long time. Remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-03-13 18:47:11 -04:00
Sam Protsenko
56041aa545 Makefile: Improve generated_defconfig file handling
Commit 2027e99e61aa ("Makefile: Run defconfig files through the C
preprocessor") adds `generated_defconfig' file, but fails to clean that
up. It might be useful to have that file around after `make' is done,
but it's better to clean that up on `make clean'. Also we probably want
to hide it in `git status' list. This patch makes the described changes,
and also adds `-P' parameter to the CPP command that produces the
`generated_defconfig' to avoid generating linemarkers.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: 2027e99e61aa ("Makefile: Run defconfig files through the C preprocessor")
Acked-by: Andrew Davis <afd@ti.com>
2024-03-13 18:47:11 -04:00
Maxim Moskalets
6d1734f005 cmd: add FDT setup for bootelf by flag
Added the ability to use FDT for ELF applications, required to run some
OS. To make FDT setup, you need to set the -d fdt_addr_r cmd option for
bootelf command. Enable by selecting CMD_ELF_FDT_SETUP.

Signed-off-by: Maxim Moskalets <Maxim.Moskalets@kaspersky.com>
2024-03-13 18:47:11 -04:00
Masahisa Kojima
f56d9a385c board: developerbox: fix mem_map setup timing
The setup of global variable mem_map was moved into enable_caches()
by commit a70c75cabae1 ("board: developerbox: move mem_map setup later")
since U-Boot was directly booted from NOR flash in XIP
and bss is not yet available in dram_init() at that time.
This has a problem, mem_map variable is used by
the get_page_table_size() to calculate the page table size,
but get_page_table_size() is called earlier than enable_caches()
which fills mem_map variable. With that, U-Boot fails to boot when
64GB DIMM is installed.

Currently U-Boot on the Developerbox board is not booted in XIP
and bss is available in dram_init(), let's move mem_map setup
in dram_init().

Signed-off-by: Masahisa Kojima <kojima.masahisa@socionext.com>
2024-03-13 18:47:11 -04:00