93333 Commits

Author SHA1 Message Date
Quentin Schulz
7400ed6a1f rockchip: add weak function symbol called at the beginning of misc_init_r
Most Rockchip boards who override misc_init_r do it only to call another
function and keep the rest unchanged. Therefore to allow for less
duplication, let's just add a weak function symbol that is called inside
misc_init_r.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
2871dee833 rockchip: avoid out-of-bounds when computing cpuid
The expected length of the cpuid, as passed with cpuid_length,
determines the size of cpuid_str string. Therefore, care should be taken
to make sure nothing is accessing data out-of-bounds.

Instead of using hardcoded values, derive them from cpuid_length.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Heinrich Schuchardt
c8a2567475 doc: fix incorrect path Documentation
When copying the build system for Linux we missed to replace some
instances of 'Documentation' by 'doc'.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-03-13 08:16:16 +01:00
Benjamin Gray
b13297cc45 doc/sphinx: fix Python string escapes
Python 3.6 introduced a DeprecationWarning for invalid escape sequences.
This is upgraded to a SyntaxWarning in Python 3.12, and will eventually
be a syntax error.

Fix these now to get ahead of it before it's an error.

Signed-off-by: Benjamin Gray <bgray@linux.ibm.com>
Message-ID: <20230912060801.95533-3-bgray@linux.ibm.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>

Adapted for U-Boot
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-03-13 08:16:16 +01:00
Wadim Egorov
f99a1e241f doc: board: phytec: phycore-am62x: Update artifact names
Use proper binary artifact names for HSFS devices.
Do not use the *_unsigned binaries.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-03-13 08:10:00 +01:00
Alexander Dahl
27987b86a0 doc: develop: commands: Fix function prototype
When using the previous prototype you got a compiler warning like this:

    warning: initialization of 'int (*)(struct cmd_tbl *, int,  int,  char * const*)' from incompatible pointer type 'int (*)(struct cmd_tbl *, int,  int,  const char **)' [-Wincompatible-pointer-types]

Fixes: 3d9640f55cb2 ("doc: expand README.commands")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
2024-03-13 08:09:23 +01:00
Mark Kettenis
1431ab8b6c efi_loader: Don't carve out memory reservations too early
Moving the efi_carve_out_dt_rsv() call in commit 1be415b21b2d
("efi_loader: create memory reservations in ACPI case")
broke boards that create additional memory reservations in
ft_board_setup() since it is now called before those additional
memory reservations are made.  This is the case for the rk3588
boards and breaks booting OpenBSD on those boards.

Move the call back to its original location and add a call in
the code path used for ACPI.

Fixes: 1be415b21b2d ("efi_loader: create memory reservations in ACPI case")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-03-13 08:06:57 +01:00
Thomas Weißschuh
0dc8cbda52 doc: fix mistyped "env flags" command
Signed-off-by: Thomas Weißschuh <thomas@t-8ch.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2024-03-13 08:05:42 +01:00
Michal Simek
03506af9da arm64: zynqmp: Describe USB wakeup interrupt
Describe usb wakeup interrupt.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d8109a218f70c257e4fc52b5032b7df68fc00786.1709887312.git.michal.simek@amd.com
2024-03-12 16:13:30 +01:00
Michal Simek
1a7ed10698 arm64: zynqmp: Remove additional compatible string for sc-revB
Based on dt schema there is no need to specify flash via additional
compatible string and generic are enough.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/54e77ad480c5de8703cb5b22408dc3bf72f3f431.1709887280.git.michal.simek@amd.com
2024-03-12 16:13:00 +01:00
Michal Simek
0f25a5a5de arm64: zynqmp: Fix gpio-key DT description
All gpio-key descriptionos with dt-schema.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a67884f4fad98b94198123eef45ffdad511b0dc6.1709887234.git.michal.simek@amd.com
2024-03-12 16:11:50 +01:00
Lukas Funke
da8d9df9a6 arm64: zynqmp: Add label to pmu fwnode
ZynqMP CG series devices only have two cpus. In this
case the interrupt-affinity property has to adapted, because
cpu3 and cpu4 are missing. By adding a label to the pmu fwnode the
interrupt-affinity can be adapted in a device specific DT.

Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Link: https://lore.kernel.org/r/20240307152956.431104-1-lukas.funke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-03-12 16:09:47 +01:00
Venkatesh Yadav Abbarapu
0508653ea6 mtd: nand: arasan: Fix the crash caused by use after free
The below exception observed on QEMU, as it doesn't support
NAND controller.

"Synchronous Abort" handler, esr 0x96000005, far 0x17acfc878
elr: 000000000803ad40 lr : 000000000805f438 (reloc)
elr: 000000007fcb4d40 lr : 000000007fcd9438
x0 : 000000007bbfc880 x1 : 00000000ff100000
x2 : 000000007fcf059c x3 : 000000007bbfc870
x4 : 000000007fd9a388 x5 : 000000017acfc870
x6 : 0000000000000000 x7 : 000000007bbfd0e0
x8 : 0000000000003dd4 x9 : 000000007bbeec0c
x10: 0000000000000001 x11: 0000000000003f8c
x12: 000000007bbeecfc x13: 000000007bbeeeb0
x14: 000000007bbeeeb0 x15: 000000007bbee474
x16: 000000007fcef18c x17: 0000000000000000
x18: 000000007bbf9d70 x19: 000000007bbfc888
x20: 000000007bbfc870 x21: 000000007fd68ddb
x22: 00000000ffffffed x23: 000000007bbfc878
x24: 0000000000000000 x25: 0000000000000000
x26: 0000000000000000 x27: 0000000000000000
x28: 0000000000000000 x29: 000000007bbeed10

Code: 927ff8c1 924000c6 8b010065 f9400887 (f94004a2)
Resetting CPU ...

The crash is caused by the use after free.
Updating the correct return codes rather than hardcoding.
Fixes: 3dd0f8cccd6d ("mtd: nand: Remove hardcoded base address of nand")

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20240306033404.18537-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-03-12 16:07:24 +01:00
Venkatesh Yadav Abbarapu
602b879efd mtd: nand: arasan: Print warning for unsupported ecc modes
Currently only hw ecc is supported in U-Boot. If any other ecc mode is
given in DT, it simply through an error. So better print
what is being done.

Revert this patch once soft ecc support is fixed in future.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20240306032703.17508-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-03-12 16:06:45 +01:00
Venkatesh Yadav Abbarapu
d59ebc8987 arm64: zynqmp: Add usb4 to the boot targets
USB4 has been added to the boot targets and
also add support to enable JTAG.

Signed-off-by: Shubhangi Shrikrushna Mahalle <shubhangi.shrikrushna-mahalle@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20240305110256.153308-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-03-12 16:04:47 +01:00
Tom Rini
7422f661e2 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
* riscv: lib: improve extension detection
* riscv: sbi: fix display format and global variable storage
* sifive: fu740: reduce DDR speed
* board: starfive vf2: switch to standard boot and fix DTS
2024-03-12 09:53:06 -04:00
Minda Chen
544af8207c board: starfive: maintainer: Add visionfive2 PCIe driver
Add PCIe driver file to visionfive2 board MAINTAINERS list.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-03-12 14:36:13 +08:00
Minda Chen
999c7ed418 board: starfive: Update maintainer of VisionFive v2 board
Update the maintainer of Starfive VisionFive v2 board.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-03-12 14:36:13 +08:00
Heinrich Schuchardt
3a223ff63c cmd: sbi: formatting PolarFire Hart Software Services version
The 'PolarFire Hart Software Services' SBI implementation returns the
version of the incorporated OpenSBI. Format the number accordingly.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
2024-03-12 14:36:13 +08:00
Heinrich Schuchardt
4de6d37fa2 cmd: sbi: Correctly display unknown implementation IDs
For an unknown implementation ID an output like

    SBI 1.0Unknown implementation ID 16777216
    Extensions:
      sbi_set_timer
      ...

was shown. The number 16777216 is not the implementation ID.

* Show the correct number
* Use a hexadecimal output format
* Add a missing line feed

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
2024-03-12 14:36:13 +08:00
Bo Gan
e6b7aeef3d riscv: dts: jh7110: Enable PLL node in SPL
Previously PLL node was missing from SPL dts. This caused BUS_ROOT
to stay on OSC clock (24Mhz). As a result, all peripherals have to
run at a much lower frequency, and loading from sdcard/emmc is slow.
Thus, enabling PLL node in dts to fix this.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-03-12 14:36:13 +08:00
Conor Dooley
0d95add3b1 riscv: cpu: improve multi-letter extension detection in supports_extension()
The first multi-letter extension after the single-letter extensions does
not have to be preceded by an underscore, which could cause the parser
to mistakenly find a single-letter extension after the start of the
multi-letter portion of the string.
Three letters precede multi-letter extensions (s, x & z), none of which
are valid single-letter extensions. The dt-binding also allows
multi-letter extensions starting with h, but no such extension have been
frozen or ratified, and the unprivileged spec no longer uses "h" as a
prefix for multi-letter hypervisor extensions, having moved to "sh"
instead. For that reason, modify the parser to stop at s, x & z to prevent
this overrun, ignoring h.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2024-03-12 14:36:13 +08:00
Leon M. Busch-George
e1d7ff220c riscv: dts: jh7110: fix indentation
Signed-off-by: Leon M. Busch-George <leon@georgemail.eu>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-03-12 14:36:13 +08:00
Heinrich Schuchardt
25e7d4bf64 serial: move sbi_dbcn_available to .data section
U-Boot SPL loads the device-tree directly behind main U-Boot overlapping
the .bss section. reserve_fdt() is called in board_init_f() to relocate the
device-tree to a safe location.

Debug UARTs are enabled before board_init_f(). With sbi_dbcn_available in
the .bss section the device-tree is corrupted when _debug_uart_init() is
called in the SBI serial driver. Move the variable to the .data section.

Link: https://bugs.launchpad.net/ubuntu/+source/u-boot/+bug/2054091
Fixes: dfe08374943c ("risc-v: implement DBCN based debug console")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
2024-03-12 14:36:13 +08:00
Thomas Perrot
7480282eca riscv: sifive: fu740: reduce DDR speed from 1866MT/s to 1600MT/s
It appears that there is some timing marginality either in the
board layout or the SoC that results in occasional data corruption
on some boards.
We observed this issue on some of the new HiFive Unmatched RevB
boards during volume production as well as some of the original
HiFive Unmatched boards from 2021 in our possession. This means
that there are other boards out there that might have the issue
too.

We have done some limited testing with DDR4 at 1600MT/s and
faulty boards (failing at 1866MT/s) passed.
We plan further testing after we procure a temperature chamber.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-03-12 14:36:13 +08:00
Nam Cao
e3a904a690 starfive: visionfive2: switch to standard boot
Distro boot scripts are deprecated. Use standard boot instead.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2024-03-12 14:36:13 +08:00
Tom Rini
20a0ce574d Prepare v2024.04-rc4
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Merge tag 'v2024.04-rc4' into next

Prepare v2024.04-rc4
2024-03-11 15:27:20 -04:00
Tom Rini
f3c979dd00 Prepare v2024.04-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
v2024.04-rc4
2024-03-11 13:11:46 -04:00
Tom Rini
da07a629e1 Merge tag 'u-boot-imx-master-20240311' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
- Use TF-A on imx8mp_beacon to fix boot regression.
- Use latest 6.8 dts for imx8mp_beacon.
- Fix the RAM initialization for phycore_imx8mp PCL-070 rev 1.
- Describe the 0087 i.mx8m mini product variant in tdx-cfg-block.
2024-03-11 09:22:44 -04:00
Tom Rini
b8ed8b1376 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-03-11 09:10:24 -04:00
Adam Ford
4484c7b3c3 arm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8
The device tree has evolved over time, so re-sync.  This also
partial reverts one change on the PCIe, because U-Boot doesn't
have a proper driver.  However, since the clock is configured
to generate a 100MHz reference clock by default, a proper driver
isn't really necessary.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2024-03-11 08:43:42 -03:00
Joao Paulo Goncalves
12d3257fa2 toradex: tdx-cfg-block: add 0087 i.mx8m mini product variant
Add new product id 0087 Verdin iMX8M Mini Quad 2GB IT.

Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
2024-03-11 08:43:27 -03:00
Adam Ford
383d4b130c configs: imx8mp_beacon: Fall back to using TF-A
When the board was originally added, it enabled some features which
allowed it to bypass Trusted Firmware, but as the feature set of
Linux grew and more features became available, the U-Boot config
options which bypassed TF-A caused issues, so it needs to return
to the standard operating mode of using TF-A or the system no
longer boots.

Fixes: ab53bd43dbde ("arm64: imx: Add support for imx8mp-beacon-kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-03-11 08:43:08 -03:00
Benjamin Hahn
76832300a9 board: phycore_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1
We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-03-11 08:42:44 -03:00
Benjamin Hahn
110d321a56 board: phytec: common: phytec_som_detection: Add phytec_get_som_type
Add a function that gets the som_type from the EEPROM.
Add an enum for the som_type.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-03-11 08:42:44 -03:00
Tom Rini
0981f8900f Merge https://source.denx.de/u-boot/custodians/u-boot-usb
- Singular quirk DT property rename.
2024-03-09 11:29:48 -05:00
Marek Vasut
91e70367a5 net: phy: Use PHY MDIO address from DT if available
In case the PHY is fully described in DT, use PHY MDIO address
from DT directly instead of always using auto-detection. This
also fixes the behavior of 'mdio list' in such DT setup, which
now prints the PHY connected to the MAC correctly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-09 10:58:48 -05:00
Tom Rini
beedf675b3 Merge branch '2024-03-07-assorted-fixes' into next
- Add phytec am64x platform, update am65-cpsw and a few other assorted
  fixes.
2024-03-07 11:56:35 -05:00
Igor Opaniuk
6ec3f92089 cmd: md5sum: use hash_command
Drop old implementation and use hash_command() instead, as
how it's currently done for crc32 and sha1sum cmds.

Test:
=> md5sum 0x60000000 0x200
md5 for 60000000 ... 600001ff ==> e6bbbe95f5b41996f4a9b9af7bbd4050

Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2024-03-07 09:23:10 -05:00
Maks Mishin
606867c849 autoboot: Add check for result of malloc_cache_aligned()
Return value of a function 'malloc_cache_aligned'
is dereferenced at autoboot.c:207 without checking for NULL,
but it is usually checked for this function.

Found by RASU JSC.

Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
2024-03-07 07:59:17 -05:00
Yang Xiwen
91febe80c9 serial: pl01x: set baudrate when probing
It is found that when DM is enabled, only generic init function is
called in .probe(). Baudrate is never honored. Add a function call
to .setbrg() when probing so that we can update the baudrate of the
serial device.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2024-03-07 07:59:16 -05:00
Roger Quadros
be2eb3ad8f net: am65-cpsw: cpsw_mdio: Switch to proper DM_MDIO framework
Add a new Kconfig symbol MDIO_TI_CPSW for the CPSW MDIO
driver and build it with proper DM support if enabled.

If MDIO_TI_CPSW is not enabled then we continue to
behave like before.

Clean up MDIO custom handling in am65-cpsw and use
dm_eth_phy_connect() to get the PHY.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
2024-03-07 07:59:16 -05:00
Roger Quadros
a0e02c6619 net: mdio: Handle bus level GPIO Reset
Some platforms have bus level Reset controlled
by a GPIO line. If available then handle bus reset
via GPIO.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-03-07 07:59:16 -05:00
Wadim Egorov
9e434756ad doc: board: phytec: Add phyCORE-AM64x
Add documentation for PHYTEC phyCORE-AM64x SoM.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-03-07 07:59:16 -05:00
Wadim Egorov
46b3ff8205 board: phytec: am64x: Add PHYTEC phyCORE-AM64x SoM
Add support for PHYTEC phyCORE-AM64x SoM.

Supported features:
  - 2GB DDR4 RAM
  - eMMC Flash
  - external uSD
  - OSPI NOR Flash
  - debug UART

Product page SoM: https://www.phytec.com/product/phycore-am64x

Device trees were taken from Linux v6.8-rc2.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-03-07 07:59:15 -05:00
Bob Wolff
9522956605 Check curve_name for null to avoid crash
If mixed rsa and ecdsa keys are specified in dtsi, an rsa key can be sent
into the ecdsa verify. Without the ecdsa,curve property, this function will
crash due to lack of checking the null pointer return.

Signed-off-by: Bob Wolff <bob.wolff68@gmail.com>
2024-03-07 07:41:41 -05:00
Tom Rini
6eb682bc7e Merge patch series "Move DRAM address of ATF"
Andrew Davis <afd@ti.com> says:

Explanation for this series is mostly in [4/6]. First 3
patches should be safe to take independent of the last 3.
2024-03-06 09:11:00 -05:00
Andrew Davis
cc0f759ddc arm: mach-k3: Move DRAM address of ATF for AM62/AM62a
The current address of TF-A in DRAM is just below the 512MB address line.
This means if the DRAM in a system is 512MB then TF-A is right at the
end of memory which is often reused, for instance U-Boot relocates itself
here. If a system has less than 512MB then that system wouldn't work at
all as TF-A would fail to load.

To avoid the issues above, move TF-A to the start of DRAM, which doesn't
change from system to system.

As TF-A is position independent, this has no dependency on TF-A. We
also fixup DT as needed when TF-A address is moved, so this change also
has no dependency on Linux and is fully forward/backward compatible.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
2024-03-06 09:09:00 -05:00
Andrew Davis
69a5085219 arm: mach-k3: am62a: Fixup TF-A/OP-TEE reserved-memory node in FDT
The address we load TFA and OP-TEE to is configurable by
CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
are static. Fix that by updating this node when the loaded address
does not match the address in DT.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
2024-03-06 09:09:00 -05:00
Andrew Davis
8b0fc29de0 arm: mach-k3: am62: Fixup TF-A/OP-TEE reserved-memory node in FDT
The address we load TF-A and OP-TEE to is configurable by Kconfig
CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
are often statically defined. As these binaries are dynamically loadable,
and in the case of OP-TEE may not even be loaded at all, hard-coding these
addresses is not a hardware description, but rather a configuration.

If the address that U-Boot loaded TF-A or OP-TEE does not match the
address in hard-coded in DT, then fix that node address. This also handles
the case when no reserved memory for these is provided by DT, which is
more correct as explained above.

Add this fixup function, and enable it for AM62.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2024-03-06 09:09:00 -05:00