SCMI clocks are now available, switch from fixed to SCMI clocks.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
We have this file in both arch/arm/dts and
dts/upstream/src/arm64/freescale. This file is identical save for
changes which have been made upstream. Remove our local copy to get in
sync with upstream now.
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
We have these files in both arch/arm/dts and
dts/upstream/src/arm/microchip. These files are identical save for
changes which have been made upstream. Remove our local copy to get in
sync with upstream now.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of moving to using OF_UPSTREAM and so the upstream DT related
header files we have a header that is under the arch/arm/dts directory
and differ in being a strict subset of what is found upstream. We can
remove this now to prevent future conflicts.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of moving to using OF_UPSTREAM and so the upstream DT related
header files we have a number of these headers that are under the
arch/arm/dts directory and differ only in combinations of spacing
changes and/or switching to SPDX license tags. We can remove these now
to prevent future conflicts.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of moving to using OF_UPSTREAM and so the upstream DT related
header files we have a number of these headers that are under the
arch/arm/dts directory and are currently identical to the versions in
dts/upstream. We can remove these now to prevent future conflicts.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of moving to using OF_UPSTREAM and so the upstream DT related
header files we have a header that is under the arch/arm/dts directory
and now unused. We can remove this now to prevent any future conflicts.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The NanoPi RK3399 boards support UHS-I (up to SDR104) SD cards, however
using any of these 1.8v modes results in a boot failure in SPL upon soft
reboot.
The issue is that the "vcc_sdio" regulator is left at 1.8v on reboot
and the corresponding GPIO defaults to 3.3v. This prevents the SD card
from being reinitialized and read successfully.
This change enables the RK8XX regulators and Rockchip IO-domain drivers
in SPL, which initializes "vcc_sdio" regulator to 3.0v and configures
the GPIO for the correct level on boot.
Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This change removes the "regulator-always-on" property from the
"vcc3v0_sd" (vmmc-supply) and "vcc_sdio" (vqmmc-supply) regulators,
which otherwise prevents the MMC driver from being able to power cycle
the SD card as part of the initialization procedure.
It also removes the "regulator-boot-on" from the "vcc_sdio" regulator,
which could theoretically damage a SD card that is already initialized
in a low voltage mode.
Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This file is a duplicate and also comes with the sync of the linux
mainline dts files. By removing this the one from the dts folder should
be taken that is more up-to-date.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
This adds initial support for the Toradex Verdin AM62P module.
The module consists of an TI AM62P family SoC, a TPS65219 PMIC, a
Gigabit Ethernet PHY, up to 8GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC,
an I2C EEPROM, an RX8130 RTC, plus an optional Bluetooth/Wi-Fi module.
These specific changes adds support for Toradex Verdin AM62P Quad 2GB WB
IT module.
Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Change the vcpumntirq in the GICv3 node from SPI to PPI.
Prevents Linux from complaining:
'[Firmware Bug]: CPU interface incapable of MMIO access'
Fixes: 6d722894fd48 "board: emulation: Add QEMU sbsa support"
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
W_DISABLE2# pin of the M.2 socket.
Add the iomux and a line name for this and rename the existing
m2_wdis# signal to m2_wdis1#.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The Gateworks GW82XX-2X is an ARM based single board computer (SBC)
comprised of the i.MX8M Plus based gw702x SoM and the gw82xx
baseboard featuring:
- i.MX8M Plus SoC
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller (GSC)
- microSD (1.8V/3.3V Capable)
- panel status bi-color LED
- pushbutton switch
- fan controller with tachometer
- USB Type-C connector
- PCIe switch
- 2x GbE RJ45 connectors
- multi-protocol RS232/RS485/RS422 Serial ports
- 2x Flexible Socket Adapters with SDIO/UART/USB/PCIe
(for M.2 and miniPCIe expansion)
- 2x isolated CAN
- GPS
- accelerometer
- magnetometer
- off-board connectors for: SPI, GPIO, I2C, ADC
- Wide range DC power input
- support for 802.3at PoE (via adapter)
Add support for it by providing its device-tree.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The commit 79d91e77f4c2 ("clk: ti: clk-k3-pll: Add additional robustness
steps to the PLL sequence") introduced a change which requires the
main_timer0 to not rely on it's own clocks which anyways was wrong.
Fix it by removing the clock dependency for it, also while at it, move
it from u-boot.dtsi to R5 as that is the only entity that should require
it as DM isn't up.
Fixes: 5d1aac358f3c ("arm: dts: k3-*-r5: Remove clocks from mcu_timer0")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Wadim Egorov <w.egorov@phytec.de>
The commit 79d91e77f4c2 ("clk: ti: clk-k3-pll: Add additional robustness
steps to the PLL sequence") introduced a change which requires the
main_timer0 to not rely on it's own clocks which anyways was wrong.
Fix it by removing the clock dependency for it, also while at it, move
it from u-boot.dtsi to R5 as that is the only entity that should require
it as DM isn't up.
Fixes: 5d1aac358f3c ("arm: dts: k3-*-r5: Remove clocks from mcu_timer0")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
The commit 79d91e77f4c2 ("clk: ti: clk-k3-pll: Add additional robustness
steps to the PLL sequence") introduced a change which requires the
main_timer0 to not rely on it's own clocks which anyways was wrong.
Fix it by removing the clock dependency for it, also while at it, move
it from u-boot.dtsi to R5 as that is the only entity that should require
it as DM isn't up.
Fixes: 5d1aac358f3c ("arm: dts: k3-*-r5: Remove clocks from mcu_timer0")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
The commit 79d91e77f4c2 ("clk: ti: clk-k3-pll: Add additional robustness
steps to the PLL sequence") introduced a change which requires the
main_timer0 to not rely on it's own clocks which anyways was wrong.
Fix it by removing the clock dependency for it, also while at it, move
it from u-boot.dtsi to R5 as that is the only entity that should require
it as DM isn't up.
Fixes: 5d1aac358f3c ("arm: dts: k3-*-r5: Remove clocks from mcu_timer0")
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
TI's Foundational Security (TIFS), Device Management (DM) and Device
Management and Security Control (DMSC) firmware are required for a
successful boot. Remove the 'optional' flag so binman will emit an error
if these firmware components are not found
Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Wadim Egorov <w.egorov@phytec.de>
Migrate to OF_UPSTREAM for phyCORE-i.MX93 since board can use upstream
Linux kernel device-tree for phyBOARD-Segin-i.MX93.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
The LG Optimus 2X is a touchscreen-based, slate-sized smartphone designed
and manufactured by LG that runs the Android operating system. The
Optimus 2X features a 4" WVGA display, an Nvidia Tegra 2 dual-core chip,
512 MB of RAM and extendable 8 GB of internal storage. UART-B is default
debug port.
Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
The LCKFB TaishanPi is a single-board computer based on the RK3566 SoC.
Specification:
- 1/2 Gib RAM
- Optinal EMMC
- SD-Card
- HDMI / MIPI CSI / MIPI DSI
- USB 2.0 Host (Type-A)
- USB 2.0 Host / OTG (Type-C)
- No Ethernet
This patch adds U-Boot support for the LCKFB TaishanPi RK3566 board, including:
- U-Boot device tree
- Default defconfig
- Board documentation
- MAINTAINERS entry
Changes in v2:
- Removed unused configs from `lckfb-tspi-rk3566_defconfig`
- Reordered TaishanPi entry in `doc/board/rockchip/rockchip.rst` alphabetically
Link to v1:
https://lore.kernel.org/u-boot/tencent_95ED0C0545D87B6A8C4B62EC045D53AD2406@qq.com/
Signed-off-by: Jiehui He <jiehui.he@foxmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The 5 Max is another board in the Orange Pi 5 family.
It's overall similar to the 5 Plus, but in a smaller form factor,
which leads to some I/O being reshuffled, but nothing relevant
to u-boot.
So, just reuse the config for the 5 Plus and adjust the DT names.
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Ilya Katsnelson <me@0upti.me>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use of SHA256 checksum validation on ARMv7 SoCs can be very time
consuming compared to when used on a ARMv8 SoC with Crypto Extensions.
Add support for use of the much faster CRC32 hash algo when SHA256 is
not supported in SPL. Also use FIT_HASH_ALGO to simplify the ifdefs when
no known hash algo has been compiled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Provide a compatible string in the config nodes that U-Boot can use to
help decide which configuration to use with SPL_LOAD_FIT_FULL=y and
FIT_BEST_MATCH=y.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Fix the indentation on the template. This is done in a separate patch
so that it is easier to review.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Move the FIT description into a template so that it can be used in both
the simple-bin and the simple-bin-spi images.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Declare arch and compression at the top of the file to avoid needing
ifdefs in every usage.
Add a few comments to help with the remaining #ifdefs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The U-Boot image is currently being identified as an invalid OS in
spl_fit_image_get_os() due to case sensitive compare.
Use the correct lower-case value to fix this.
Fixes: e0c0efff2a02 ("rockchip: Support building the all output files in binman")
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
This was only used on RK3288 Chromebooks and the EVB.
If it follows the same pattern as for RK3399 Chromebooks where their
maintainer (Simon) agreed[1] to removal of u-boot.rom on the basis that
the generic u-boot-rockchip-spi.bin is now enough, let's do the same for
RK3288 and remove the last Rockchip users of u-boot.rom (and HAS_ROM
symbol).
At the same time, remove HAS_ROM symbol from the RK3288 Chromebooks and
EVB configs since they were used only for that.
SYS_SPI_U_BOOT_OFFS offset in rockchip-u-boot.dtsi for the u-boot-img
node of simple-bin-spi binman image matches the one used in u-boot.rom
except for the EVB.
The EVB doesn't have ROCKCHIP_SPI_IMAGE symbol enabled, so HAS_ROM had
no effect anyway. Even if it had, this would not have been enough
considering that SPL_SPI_LOAD symbol is not set, so U-Boot proper could
not be loaded from SPI even if SPL/TPL does.
Make sure u-boot-rockchip-spi.bin has the same size of u-boot.rom for
Chromebooks as that seems to be important.
[1] https://lore.kernel.org/u-boot/CAFLszTh-SewFod8dEOF3+e-wCE1qFF0CyxxR8CbQwy3BRW3k6w@mail.gmail.com/
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-kevin
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
This was only used on RK3399 Gru Chromebooks and their maintainer
(Simon) agreed[1] to its removal on the basis that the generic
u-boot-rockchip-spi.bin is now enough, so let's do that.
At the same time, remove HAS_ROM symbol from the Gru Chromebooks config
since they were used only for that.
Make sure u-boot-rockchip-spi.bin has the same size of u-boot.rom for
Chromebooks as that seems to be important.
[1] https://lore.kernel.org/u-boot/CAFLszTh-SewFod8dEOF3+e-wCE1qFF0CyxxR8CbQwy3BRW3k6w@mail.gmail.com/
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook-kevin
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
[backport from Linux commit db4fc2c79c533986795a7750e9a12caf9d620b48]
As reported in the section 8.3 (i. e. Board revision history) of document
UM2033 (i. e. Discovery kit with STM32F769NI MCU) these are the changes
related to the board revision addressed by the patch:
- Board MB1166 revision A-09:
- LCD FRIDA FRD397B25009-D-CTK replaced by FRIDA FRD400B25025-A-CTK
The patch adds the DTS support for the new display which belongs to the
the Novatek NT35510-based panel family.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This patch adds i.MX95 19x19 EVK board basic support.
Messaging unit for EdgeLock Secure Enclave, messaging unit for System
Manager, uSDHC for SD Card, gpio, lpuart are supported now.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Nishanth Menon <nm@ti.com> says:
Just happened to get a BeagleY-AI at desk and happened to test master
branch (7dd49a9264a6 drivers: scsi: Add 'erase' support), noticed a few
issues which were rather easy to solve.. so, here we go:
Link: https://lore.kernel.org/r/20250425173120.141503-1-nm@ti.com
Just like TF-A and OP-TEE, the documentation states a custom path for DM
can be provided at build time by setting TI_DM. This should then set
ti-dm-path which updates ti-dm node filenames in binman.
Two issues prevent this from functioning for most K3 boards. One is when
then DM firmware name is inside a blob-ext node instead of a ti-dm node.
The second is when the filename in the ti-dm node is a pointer to a
blob-ext node. In this case even though the filename is updated, the
filename in the blob-ext is not, so build can fail if the default
file in the blob-ext cannot be found, even if the updated ti-dm file
does exist.
Fix both of these for all K3 by removing any indirect ti-dm nodes and
making sure all DM nodes are labeled with "ti-dm".
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
SeeedStudio BeagleBone Green Eco (BBGE) is a clone of the BeagleBone Green
(BBG). It has minor differences from the BBG, such as a different PMIC,
a different Ethernet PHY, and a larger eMMC.
The PMIC is not yet supported in mainline, but the work is ongoing.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Add the PMIC ESM node which is responsible for triggering the PMIC
reset.
Suggested-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
Add the PMIC ESM node which is responsible for triggering the PMIC
reset.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
main_gpio1 controls the voltage for the SDcard from 3.3v to 1.8v.
This is required for proper operation of SDcard through various boot
stages.
Fixes the following seen in the boot log:
failed to set vqmmc-voltage to 3.3V
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
