CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22989
- Remove unneeded USB board code and fix reset on mx6ul_14x14_evk.
- Update fastboot buffer size/address for verdin-imx8m{m|p}.
- Fix imxrt1050-evk boot and convert it to standard boot.
- Fix imx8qxp-mek and imx8qm-mek boot.
- Add support for the i.MX93 9X9 QSB board.
- Make livetree API to work on i.MX.
- Set sane default value for i.MX8M SPL_LOAD_FIT_ADDRESS.
- Deduplicate DH i.MX8MP/i.MX6 DHSOM defconfigs.
- Select default TEXT_BASE for i.MX6/i.MX7.
- Several updates for DH i.MX8MP DRC02.
Move i.MX7 TEXT_BASE/SPL_TEXT_BASE to Kconfig and common/spl/Kconfig
which is the best practice.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Two of the clocks required by the usdhc1 controller are missing from the
clock controller node. A recent change enables all the clocks in the
esdhc node, which fails as they are not defined in the clock controller.
Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API")
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
The Hardkernel ODROID-M1S is a single-board computer based on Rockchip
RK3566 SoC. It features e.g. 4/8 GB LPDDR4 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0.
Features tested on a ODROID-M1S 8GB rev1.0 20230906:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Hardkernel ODROID-M2 is a single-board computer based on Rockchip
RK3588S2 SoC. It features e.g. 8/16 GB LPDDR5 RAM, 64 GB eMMC, SD-card,
GbE LAN, HDMI 2.0, M.2 NVMe and USB 2.0/3.0/Type-C.
Features tested on a ODROID-M2 16GB rev1.0 20240611:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe/NVMe
- USB gadget
- USB host
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Allow to disable serial console in SPL. Weak dependency is already used
with TPL serial.
Signed-off-by: Daniel Semkowicz <dse@thaumatec.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable the PD_VO power domain before driver access on the rk3568 SoC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Refactor the board detection logic (again) to make it compatible with
the upstream device-trees, and switch to OF_UPSTREAM.
Now the device boots with the device-tree for the 353P, and then
loads the correct device tree (of 10) in the later stages of SPL.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add dedicated getter and setter for SCLK_UART0_PMU.
This allows the driver to correctly handle UART0 clocks, and thus
it fixes the issues with UART0 not working in case DEBUG_UART is
disabled.
Unlike other Rockchip SoCs, i.e. rk3399, in the PX30 the default
clock source for UART is GPLL, instead of external oscillator.
If the DEBUG_UART is enabled, the clock source is changed in
board_debug_uart_init function to 24Mhz oscillator, which also
matches the fallback value obtained from DT node.
In case the DEBUG_UART is disabled, the UART clock source remains
default, and the DM serial driver wrongly configures the baud rate,
resulting in broken communication.
By implementing the UART clock getter/setter, the serial driver
can probe the actual configuration and corectly configure itself.
The DEBUG_UART settings now should not affect it.
The driver supports GPLL and 24M oscillator. NPLL and USBPHY480M
sources, that are managed by CRU, are not yet handled, as likely
they won't be used in real scenarios.
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Basically, Radxa's boards are intended to turn LEDs on at U-Boot.
add `default-state = "on"` to u-boot.dtsi.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
ROCK Pi 4 series and ROCK 4C+ cannot share .dtsi file because 4C+ is
different board.
add rk3399-rock-pi-4-u-boot.dtsi contents and remove dependency of it.
no functional change is intended.
Fixes: 71a95e2efd30 ("arm: dts: rockchip: add Radxa ROCK 4C+")
Suggested-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Fix the issue introduced by commit fed064477c2c
("arm64: zynqmp: Print an error for split to lock mode switch").
The mini u-boot is hanging, because of the tcm is not initialized.
The mini u-boot is using the tcm to reserve the mmu table and
currently it is not initialized, so allowing u-boot to initialize
the tcm.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20241011113435.1966604-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add "cap-mmc-hw-reset" property to the eMMC DT node to perform the
eMMC device hardware reset.
Also, add "no-sd", "no-sdio" properties to eMMC DT node to skip
unwanted sd, sdio related commands during initialization for eMMC
device as this may lead to unnecessary register dump.
Signed-off-by: Paul Alvin <alvin.paulp@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b31554816a3378365143e9f5c266f6386af0a438.1727247785.git.michal.simek@amd.com
The RPU pytest introduced by commit e894c10c040b
("test/py: zynqmp_rpu: Add test for loading RPU apps") expects
3rd parameter as string not a number that's why extend command
to actually handle both. The issue with existing code is that
when any non number string is passed hextoul returns 0. For
backward compatibility zynqmp tcminit 0/1 can be still used but
it is recommended to use strings instead.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20240930043814.530181-3-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The zynqmp tcminit crashes the U-Boot when switching from
r5-mode "split" to "lockstep" instead it should throw an error.
When cpu is enabled, the check_tcm_mode() function checks
if the previous mode is "split", switch mode is "lockstep" then
it returns the error code and the initialize_tcm() function is not
updating the global control register of the RPU instead it prints
the error message. When cpu is disabled, the check_tcm_mode()
function returns the success code for switch split to lockstep mode.
Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20240930043814.530181-2-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
serial_init runs into panic because no serial device found.
Update the device tree to include bootph-some-ram for some critial
devices needed in pre-reloc stage
Also update usdhc related properties to avoid card initialization
failure.
Fixes: 8c103c33fb1 ("dm: dts: Convert driver model tags to use new schema")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
serial_init runs into panic because no serial device found.
Update the device tree to include bootph-some-ram for some critial
devices needed in pre-reloc tage
Fixes: 8c103c33fb1 ("dm: dts: Convert driver model tags to use new schema")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add the latest 4000 MT/s DDR config generated by
Jacinto7_DDRSS_RegConfigTool Rev 0.11 for J722S , make it the
default config and update A53 default clock to 1.4 GHz matching
the default speed grade (K).
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Modifying a generic header like watchdog.h, removing not directly used
asm/ptrace.h header relies on whoever includes it to already have
included something that defines the type ulong.
Make the asm/ptrace.h header self-contained by including the proper
header.
Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Also adds bootph-pre-ram property to VTM node and the pmic node.
vdd-supply is used to assign the buck regulator that the AVS driver can
use to program the proper voltage which it picked up from e-fuse.
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
Adaptive Voltage Scaling (AVS) Class 0 is a procedure for lowering the
voltage on certain device power rails. Initialize AVS Class 0.
Link: https://www.ti.com/lit/pdf/spruj28 (Section 5.2.3.3.2.5 AVS-Class0)
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
Without asm/cpu_x86.h inclusion a compiler is not happy:
arch/x86/cpu/cpu_x86.c:14:5: warning: no previous prototype for ‘cpu_x86_bind’ [-Wmissing-prototypes]
arch/x86/cpu/cpu_x86.c:29:5: warning: no previous prototype for ‘cpu_x86_get_vendor’ [-Wmissing-prototypes]
arch/x86/cpu/cpu_x86.c:41:5: warning: no previous prototype for ‘cpu_x86_get_desc’ [-Wmissing-prototypes]
arch/x86/cpu/cpu_x86.c:55:5: warning: no previous prototype for ‘cpu_x86_get_count’ [-Wmissing-prototypes]
Add missing header inclusion.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The compiler is not happy to have no prototypes for the functions that
are not defined static. Add them. This helps avoiding the compiler warnings:
arch/x86/cpu/cpu.c:197:13: warning: no previous prototype for ‘board_final_init’ [-Wmissing-prototypes]
arch/x86/cpu/cpu.c:205:13: warning: no previous prototype for ‘board_final_cleanup’ [-Wmissing-prototypes]
arch/x86/cpu/cpu.c:307:5: warning: no previous prototype for ‘reserve_arch’ [-Wmissing-prototypes]
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some functions are not used anywhere except the same file
where they are defined. Mark them static. This helps avoiding
the compiler warnings:
arch/x86/cpu/cpu.c:343:6: warning: no previous prototype for ‘detect_coreboot_table_at’ [-Wmissing-prototypes]
arch/x86/cpu/mtrr.c:90:6: warning: no previous prototype for ‘mtrr_write_all’ [-Wmissing-prototypes]
arch/x86/cpu/i386/interrupt.c:240:6: warning: no previous prototype for ‘__do_irq’ [-Wmissing-prototypes]
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Most of the copies of the print_cpuinfo() call the default method.
Remove all of those in order to have only the default one when
no `cpu` command is compiled.
This also helps avoiding compiler warning, e.g.:
arch/x86/cpu/tangier/tangier.c:23:5: warning: no previous prototype for ‘print_cpuinfo’ [-Wmissing-prototypes]
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present menu items are stored according to their sequence number in
the menu. In some cases we may want to have holes in that sequence, or
not use a sequence at all.
Add a new 'value' property for menu items. This will be used for
reading and writing, if present. If there is no 'value' property, then
the normal sequence number will be used instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This phandle was missing in the sandbox DT, add it, otherwise sandbox-i2c
driver cannot look up the emulator via i2c_emul_find(). This fixes the
following i2c_emul_find() error:
"
$ ./u-boot -Dc ""
...
i2c_emul_find() No emulators for device 'sandbox_pmic'
sandbox_pmic_write() write error to device: 0000000018c568d0 register: 0x0!
out_set_value() PMIC write failed: -5
i2c_emul_find() No emulators for device 'sandbox_pmic'
sandbox_pmic_write() write error to device: 0000000018c568d0 register: 0x0!
out_set_value() PMIC write failed: -5
...
"
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
With sandbox_spl we want to use the file-based boot in CI, so that this
flow is tested. The recent UPL change enabled booting via that method,
thus overriding the file-based boot.
Correct this by using UPL only when the --upl flag is given.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 91fde8e1764 ("sandbox: Add an SPL loader for UPL")
Receiving timestamps from coreboot was unceremoniously dropped some time
ago. Add it back.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 8ad01ce36f7 ("x86: Remove x86 specific GD flags as they are...")
Rather than using a special variable, get the timestamp info from the
coreboot sysinfo struct. Return a proper error as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
When bootstage is used the timer can be inited before the CPU identity
is set up, resulting in the checks for the vendor not working.
Add a special call to work around this.
Signed-off-by: Simon Glass <sjg@chromium.org>
While a few SoCs have a unique print_cpuinfo function, a number of them
just use default_print_cpuinfo. Make default_print_cpuinfo have a weak
alias to provie print_cpuinfo.
Signed-off-by: Tom Rini <trini@konsulko.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22796
- Switch to using upstream DT on DH i.MX8MP DHCOM PDK2/PDK3.
- Add ability to build fallback DTBOs from arch/$(ARCH)/dts.
- Remove fdt_high and initrd_high env variables from imx6-dhcom.
- Add dummy clk for imx8.
- Fix DT corruption in imx8_cpu.
- Improve DDR stability on pico-imx7d.
-----BEGIN PGP SIGNATURE-----
iQFNBAABCgA3FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmcSLuYZHGV1Z2VuLmhy
aXN0ZXZAbGluYXJvLm9yZwAKCRAesx4CDqwvyBeeB/9xoXcp4T1eVgKFfxLbaKqJ
6PQmvmp6D1aHE6+cW3KigZBeM6o80o24VfOMmseKmEACQJ2q9lkGHo2QoQV/LYVX
1x9AfjA7vMp3pCapulJJ6OGFeyLhq0guBfkJDR0Gb45V1+Zu0TS6IYGLytAzqYpj
22ysXajF0p2nhc7HjAnf9jWEHfD/QqEzTfNzSo0eMPQM5KgrR6QmrIZM/A0A+Jhi
hyEtaJV0YB3xKIN0MYZ2O49Pe6oscFznDN/v0w5v06rDW8X5vt/gim6ddUf2DmaR
hmnOP9oObY5VnLj5x4RdZ9M3pDRWSvBjrpx8EZSP5T3pWMqwPCibREblRm4R7loq
=JgV7
-----END PGP SIGNATURE-----
Merge tag 'u-boot-at91-fixes-2025.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91
First set of u-boot-at91 fixes for the 2025.01 cycle:
This small set includes the maintainer e-mail update and a missing
header that was causing some build issues.
Enable OF_UPSTREAM to use upstream DT and add freescale/ prefix to the
DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
including *-u-boot.dtsi and DTBOs from arch/$(ARCH)/dts/ directory.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
In one inline function in this header `readl()` is used, but the
declaration was not found, so buildman gave this warning:
w+include/asm/arch/clk.h: In function 'get_h32mxdiv':
w+include/asm/arch/clk.h:65:16: warning: implicit declaration of function 'readl' [-Wimplicit-function-declaration]
Fixes: 927b901b47a6 ("ARM: atmel: add sama5d4ek board support")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Prasanth Babu Mantena <p-mantena@ti.com> says:
The channel allocation and deallocation for dma copy was happening on every
dma transfer. This is a overhead for transactions like NAND, which does
page reads recursively for complete data.
So, moving the dma allocation to probe and implement corresponding
remove function and cleanup dma device while exiting from spl.
Enable SPL_DM_DEVICE_REMOVE, for device removal capability in SPL.
Link: https://lore.kernel.org/r/20241009145703.1970034-1-p-mantena@ti.com
While exiting from spl, remove any dma device active through
spl_board_prepare_for_boot(). This is required for cleaning up
any dma channels being used in spl and avoid issues with overlapping
channel allocation in the next stage bootloaders.
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
J722S SOC have two variants as HS-FS and HS-SE.
Add binman support for HS-SE variant.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
[j-choudhary@ti.com: Fix load-dm-data entry and indentation]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Add clk and device data which can be used by wkup_uart driver
to configure clocks and PSC.
Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
AM62x devices now support CPU throttling based on thermal alerts
with a Linux commit 10e7bfd8114c ("arm64: dts: ti: k3-am62: Enable
CPU freq throttling on thermal alert"). However, this functionality
does not work correctly across all variants of the AM62x SoCs
which have different numbers of Cortex-A CPU cores: AM62x1 (1 core),
AM62x2 (2 cores), and AM62x4 (4 cores). On single-core and dual-core
AM62x devices, the following error is observed in the Linux kernel:
OF: /thermal-zones/main0-thermal/cooling-maps/map0: could not find
phandle 94
OF: /thermal-zones/main1-thermal/cooling-maps/map0: could not find
phandle 94
This commit adds a fixup to dynamically adjust the cooling-device
nodes in the thermal zones based on the actual number of CPU cores
available. This resolves the issue of CPU throttling not working
correctly on single-core and dual-core AM62x devices, while
maintaining the functionality for AM62x quad-core devices.
A similar approach is implemented for example on i.MX8MM SoC.
Signed-off-by: Parth Pancholi <parth.pancholi@toradex.com>
