Initialize mtd->writesize in nand_init() as otherwise
nand_page_size() returns 0 and this affects NAND read
operations.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
MUX_MMIO is needed by HBMC in SPL stage. Enable it at SPL as well
as u-boot proper stage.
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
File system such as YAFFS2 need to know the number of available
OOB bytes per page to be able to choose if they should locate their
metadata in the data area or in the spare area.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In nanddev_init mtd and memorg are assigned values that dereference nand
but this happens before a NULL check for nand. Move the assignments
after the NULL check.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The driver currently does:
mtd->dev->parent = cadence->dev;
This works in Linux because `struct mtd_info` embeds a `struct device`,
so `mtd->dev` is always valid and its `.parent` can be set.
In U-Boot, however, `mtd->dev` is only a pointer to a `struct udevice`.
Dereferencing it before assignment is invalid, which breaks the device
hierarchy. As a result, consumers relying on `mtd->dev` (e.g. partition
parser, reset and re-init paths) operate on a dangling pointer. This
leads to failures during warm reset when the NAND device is accessed
again.
Fix by assigning the device pointer directly:
mtd->dev = cadence->dev;
This matches U-Boot’s device model, preserves a valid hierarchy, and
resolves the warm reset issue on Cadence NAND.
Fixes: ebc41cad ("drivers: mtd: nand: Add driver for Cadence Nand")
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@altera.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
s25_s28_mdp_ready() returns 1 when spansion_sr_ready() returns negative
value (error code). Fix this problem by following Linux implementation.
Fixes: 1c3dd193b5b ("mtd: spi-nor-core: Add fixups for Cypress s25hl-t/s25hs-t")
Reported-by: Hiroyuki Saito <Hiroyuki.Saito2@infineon.com>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Add IDs for Winbond W77Q51NW, 512M-bit Secure Serial Flash Memory
with Post-Quantum Cryptography, Dual/Quad SPI, QPI and DTR . The
flash part is similar to W25Q512NWM .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
As no platforms use this driver anymore let's go ahead and remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
In mxs_nand_init_ctrl there are a couple of error paths that do not set
err which could lead to the errors being silently ignored despite the
function not completing. Rather than just using if to detect these
errors use err to collect the error return value from the called
functions.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
In denali_wait_for_irq the code will either return from inside the while
loop or exit with time_left being 0. The following test for time_left
being 0 is guranteed to be true so remove the test and the following
unreachable code.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
In init_nand_dma there was code to detect failure to allocate memory but
it had two problems. Firstly the 2nd clause when info->tx_desc was NULL
attempted to free info->tx_desc when it should be freeing info->rx_desc.
Secondly there was no detection of both allocations failing, arguably
the more likely scenario. Refactor the code to simplify it and just fail
as soon as either allocation fails.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Add kfree calls on error paths for memory that was allocated. This will
prevent memory leaks.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
In stm32_fmc2_nfc_probe there are 3 error returns that do not set the
error code before returning which could lead to the error being silently
ignored. Just return -EINVAL in each case.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In pxa3xx_nand_probe_dt if the function detects an error after
allocating memory that memory is not freed before exit. Add the
appropriate free.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: MIchael Trimarchi <michael@amarulasolutions.com>
E Shattow <e@freeshell.de> says:
Make consistent use of lowercase hexadecimal prefix '0x' throughout U-Boot.
There are a few remaining uses of uppercase 'X' to denote hexadecimal prefix
or placeholder in documentation and error messages.
External devicetree-rebasing dts/upstream and the generated code of
xilinx/zynq are ignored for the series.
Link: https://lore.kernel.org/r/20250606224558.1117422-1-e@freeshell.de
Use consistent lowercase hex prefix style in drivers/*
Does not change hex prefix case in allcaps uppercase style error messages
Signed-off-by: E Shattow <e@freeshell.de>
Tom Rini <trini@konsulko.com> says:
Hey all,
Related to my other series I've posted recently on cleaning up some
headers, this series here is the result of at least lightly auditing the
#includes used in include/[a-m]*.h. This ignores subdirectories, as at
least in part I think the top-level includes we've constructed are the
most likely places to have some extra transitive include paths. I'm sure
there's exceptions and I'll likely audit deeper once this first pass is
done. This only gets as far as "include/m*.h" because I didn't want this
to get too big. This also sets aside <miiphy.h> and <phy.h>. While
miiphy.h does not directly need <phy.h> there are *so* many users and I
think I had half of the tree just about not building when I first tried.
It might be worth further investigation, but it might just be OK as-is.
Link: https://lore.kernel.org/r/20250521230119.2084088-1-trini@konsulko.com
There are only a few things found in <mtd.h> today. Go through and audit
the C files which include <mtd.h> and remove it when not required. Then,
add it to the files which had either missed it or had an indirect
inclusion of it.
Signed-off-by: Tom Rini <trini@konsulko.com>
The clock driver allows to boost the NAND performance
controller. Make changes to let it use the new clock driver
=> time nand read ${loadaddr} kernel
NAND read: device 0 offset 0x500000, size 0x800000
8388608 bytes read: OK
time: 0.488 seconds
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Make simple the clock registration and enable and allow later
to add support for other platforms
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Write enable(06h) command will be sent to a flash device to
set the write enable latch bit before every program, erase,
write command. After that write disable command (04h) needs
to be sent to clear the write enable latch.
This write_disable() is missing at the majority of the places
in the driver, add it to clear write enable latch.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://gist.github.com/PrasanthBabuMantena/c12f39744de188a9d08cd5ca51dc2a7b
Tested-by: Prasanth Babu Mantena <p-mantena@ti.com>
MT35XU512ABA has only BFPT and 4-Byte Address Instruction Table
in SFDP. commit bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map")
added checks in spi_nor_octal_dtr_enable() to bail out if the 22nd DWORD
in SCCR does not indicate DTR Octal Mode Enable, since MT35XU512ABA device
supports octal DTR mode, add this property in SFDP fixup.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
The MTD device reference is dropped via put_mtd_device, however its
field ->index is read and passed to ubi_msg. To fix this, the patch
moves the reference dropping after calling ubi_msg.
Signed-off-by: Pan Bian <bianpan2016@163.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Upstream Linux commit: b95f83ab762dd6211351b9140f99f43644076ca8
Signed-off-by: Alexander Vickberg <wickbergster@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Flash partitions may specify MTDPART_SIZ_FULL (=0) as the size of the
partition to indicate "the remainder of the flash". Make this work with
device-tree "fixed-partitions" as well.
This makes MTD partitioning compatible with the Linux kernel, see:
https://github.com/torvalds/linux/blob/master/include/linux/mtd/partitions.h#L29https://github.com/torvalds/linux/blob/master/drivers/mtd/mtdpart.c#L123
Previously, this could only be done through MTDPARTS so this change allows
boards like topic_miami to migrate from `mtdparts`/`mtdids` to devicetree
partitions.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
At the moment a mixture of ifdef(CONFIG_IS_ENABLED) and
CONFIG_IS_ENABLED(SPI_FLASH_BAR) is used in the spi-nor framework.
This leads to misbehaviour in the SPL as there is no Kconfig option
CONFIG_SPL_SPI_FLASH_BAR. This commit standardizes the use of
CONFIG_SPI_FLASH to get SPLs that load U-Boot proper from the
SPI flash to work again.
Fixes: 9bb02f7 (mtd: spi-nor: Fix the spi_nor_read() when config SPI_STACKED_PARALLEL is enabled)
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Since the opcode SPINOR_OP_CHIP_ERASE (0xc7) is not supported
for the mt35xu01g/2g flashes, the NO_CHIP_ERASE flag has been added
to enable sector erase functionality instead.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
The mtd partition offset must be calculated first as it will be
referenced when calculating the mtd partition size.
Change-Id: Iccfd101b0a9597ac240c25670da638a82af28980
Fixes: 1ca97ee9039 (mtd: mtdpart: Support MTD_SIZE_REMAINING with unallocated memory area)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reported-by: Francesco Dolcini <francesco@dolcini.it>
Call SPI setup_for_spinand() if supported and defined to configure the
SPI slave for the attached NAND. This is needed to configure the SPI
with the NAND page size and spare size for correct configuration of the
device.
Call it as soon as the NAND is detected to correctly handle SPI
controller with select_op_variant detection.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Andre Przywara <andre.przywara@arm.com> says:
C's implicit fallthrough behaviour in switch/case statements can lead to
subtle bugs. Quite some while ago many compilers introduced warnings in
those cases, requiring intentional fallthrough's to be annotated.
So far we were not enabling that compiler option, so many ambiguities
and some bugs in the code went unnoticed.
This series adds the required annotations in code paths that the first
stage of the U-Boot CI covers. There is a large number of cases left
in the libbz2 code. The usage of switch/case is borderline insane there,
labels are hidden in macros, and there are no breaks, but just goto's.
Upstream still uses very similar code, without any annotations. I still
am not 100% sure those are meant to fall through or not, and plan to do
further investigations, but didn't want to hold the rest of the patches
back. You can see for yourself by applying patch 18/18 and building for
sandbox64, for instance.
Because of this we cannot quite enable the warning in the Makefile yet,
but those fixes are worth regardless, and be it to increase readability.
Please note that those patches do not fix anything, really, they just add
those fallthrough annotations, so the series is not really critical.
Link: https://lore.kernel.org/r/20250327153313.2105227-1-andre.przywara@arm.com
The raw NAND flash code uses an implicit switch/case fallthrough to
share code when dealing with different ECC modes, and also when handling
some read command.
Add our "fallthrough;" statement-like macro before the respective labels
in the NAND code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
This copies the fallthrough annotations that the original kernel code
gained, before this function got refactored there.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Michael Trimrachi <michael@amarulasolutions.com>
The SPI NOR code uses an implicit switch/case fallthrough when checking
different vendors to determine how to deal with extended addressig modes.
Add our "fallthrough;" statement-like macro before some label in the
4-byte addressing mode code, to avoid a warning when GCC's
-Wimplicit-fallthrough warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The UBI code uses an implicit switch/case fallthrough when handling two
related cases of bad header errors. Also there is a switch/case for unit
prefix handling (G/M/K), which accumulates multiplications.
Add our "fallthrough;" statement-like macro before the respective labels
in both cases, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL),
then driver doesn't copy OOB data from 'oob_poi' to special controller
structures, so zeroes will be written as OOB. But, generic raw NAND logic
in 'nand_base.c' already handles case when OOB is not required to write by
filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to
always read 'oob_poi' data for OOB.
Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way,
so need to keep same behaviour here.
Fixes: c2e8c4d09a7a ("mtd: rawnand: Meson NAND controller support")
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Add SYS_NAND_PAGE_SIZE dependency for cadence NAND.
This config is needed as the SPL driver will use this parameter
to read uboot-proper image in NAND during booting.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Add support for spl nand to load binary image from NAND
to RAM. Leverage the existing nand_spl_load_image from nand_spl_loaders.c
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
