Boards based on the Allwinner D1/T113-s3, such as the
NetCube Systems Nagami, can expose a third I2C controller
on PG10/PG11. However, the sun20i_d1 pinctrl function table
lacked an entry for this mux.
Add the "i2c3" function with mux value 3 on PG10/PG11, allowing device
trees to enable the I2C3 controller.
Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on Milos SoC, with support for special pins.
Correct pin configuration is required for working debug UART and eMMC/SD
cards.
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-1-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Added pingrp support to sc7280 pinctrl driver based on the
similar U-Boot and Linux drivers.
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20251112165459.1560966-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
In the original code, I wrote a custom pin muxing parser but the
upstream device trees wouldn't accept something like that so it would
have complicated mergine the device tree files.
Use the standard device tree format with function and groups:
pinmux1: pinmux1 {
function = "f_gpio1";
groups = "grp_1", "grp_3";
};
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
* Some consistency cleanups of recently added Genio boards (510/700/1200).
* Some pinctrl improvements to support newer MediaTek SOCs (mt8189 compatible).
* New devicetree and config for Genio 520/720 EVK boards (can boot to eMMC or SD).
* New CPU-specific functions to read vendor-specific CPU info at runtime.
-----BEGIN PGP SIGNATURE-----
iQFKBAABCgA0FiEE7BjZnmIOg9ac2GiYwswgAf8Bj8AFAmnVTpIWHGRsZWNobmVy
QGJheWxpYnJlLmNvbQAKCRDCzCAB/wGPwKp1B/9cIRczscU/YqtLg1Y8tO4iMpYF
VibI+jG0xEoxQwOMeRAjVamIB6sKdPufFuVc16ddR4Ouq5hMfQZ0oxlMCsA4sWvu
ewjRtdULBU+6qF2qsf2CJa6yTw9ZQqVGS5oAORkhgeix/UPMIqIIMTowXj3cZR1d
iXipdkjfbeuYtBXHm4i4Z+6IsnzgrhUcIRqsH/W9Bgu2bdawdQLDHOZePnO8gZPG
AD06aO1aM0diWprxxs3AxUO0qPTjHMqZaVZkvHxLSbfloy35D3MWArZUF0awAt1X
yW2Kv00TWstL0cGtNliILPsLL/5qw3nL5O60oa+UVpTPVAU4yng25K97LJ2d
=4lYY
-----END PGP SIGNATURE-----
Merge tag 'mediatek-for-master-2026-04-07' of https://source.denx.de/u-boot/custodians/u-boot-mediatek
This is the first wave of MediaTek changes for this merge window. We
also expect to be sending another decent-sized pull request later for
the backlog of patches that are currently waiting on dependencies or
need little more time for review.
* Fixes for cargo-culted issues in mach-mediatek init.c files.
* Some consistency cleanups of recently added Genio boards (510/700/1200).
* Some pinctrl improvements to support newer MediaTek SOCs (mt8189 compatible).
* New devicetree and config for Genio 520/720 EVK boards (can boot to eMMC or SD).
* New CPU-specific functions to read vendor-specific CPU info at runtime.
The U_BOOT_DRIVER macro creates a list of drivers used at link time, and
all entries here must be unique. This in turn means that all entries in
the code should also be unique in order to not lead to build failures
later with unexpected build combinations. Typically, the problem we have
here is when a driver is obviously based on another driver and didn't
update this particular field and so while the name field reflects
something unique the linker entry itself is not. In a few places this
provides a more suitable string name as well, however.
Reviewed-by: Marek Vasut <marek.vasut+usb@mailbox.org>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # Tegra
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Set the get_pinconf functions for the mt8189 pinctrl driver. This will
append pinconf bias info to the output of the pinmux status command.
This is useful for debugging pin configuration issues.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-4-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add functionality to be able to print pin bias settings along with the
pinmux setting.
This can be useful to debug why pins might not be working correctly.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-3-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Fix setting pinconf bias for MT8189.
Using mtk_pinconf_bias_set_v1() was wrong because MT8189 does not have
PULLEN/PULLSEL registers. It has PU and PD registers for most pins.
MSDC pins need special handling since they have PUPD/R1/R0 registers.
I2C pins need special handling since they have PU/PD/RSEL registers.
New groups are added for MSDC and I2C pins and the bias_set callback
is now set appropriately for all groups.
A new table is needed for the RSEL registers since those were missing.
Some new macros are introduced to avoid repeating the same info many
times in MTK_TYPED_PIN(). This also fixes the semantically incorrect
use of DRV_GRPX for the IO_TYPE_GRPX field.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-2-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add a new PINCTRL_PIN_REG_RSEL register type and a new function
mtk_pinconf_bias_set_pu_pd_rsel() to handle setting it.
Some MediaTek SoCs have a pin configuration register called RSEL that
sets the resistance value for bias pullup/pulldown.
Link: https://patch.msgid.link/20260330-pinctrl-mtk-fix-mt8189-v2-1-05a737ec623d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
As exposed by "make randconfig", we have an issue with the dependencies
for PINCTRL_TH1520. It really needs to depend on PINCTRL_GENERIC rather
than select it, and PINCTRL_GENERIC in turn already depends on
PINCTRL_FULL.
Signed-off-by: Tom Rini <trini@konsulko.com>
Commit f4df9f53b7a9 ("pinctrl: mediatek: Bind gpio while binding pinctrl")
refactored pinctrl-mtk-common.c and the SoC-specific drivers to register
the gpiochip during the bind phase instead of probe. As part of this
change, each SoC driver must implement a bind callback.
The drivers recently added for mt8188, mt8189, mt8195 and mt8365 do not
define this callback, which prevents the gpiochip from being registered
properly.
Add the missing bind callback to these drivers.
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260312-pinctrl-mtk-bind-gpio-v1-1-21b8968902ed@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
This driver adds the base support of pinctrl over SCMI. The driver
does two main things. First, it allows you to configure the initial
pin states. Secondly, it's used a base to build a GPIO driver on
top of it.
To configure the states then add a pinmux config to the scmi_pinctrl
section:
scmi_pinctrl: protocol@19 {
reg = <0x19>;
pinmux1: pinmux_test {
pinmux = <0 1 0xFFFFFFFF 18 1
0 2 0xFFFFFFFF 18 1
0 3 0xFFFFFFFF 18 1>;
function = "f_gpio1";
groups = "grp_1", "grp_3";
};
};
Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing. However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server. The
numbers are: selector, identifier, function_id, config_type, and
config_value. In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add all the pinctrl message IDs. I renamed SCMI_MSG_PINCTRL_CONFIG_SET
to SCMI_PINCTRL_SETTINGS_CONFIGURE so the naming matches the spec better.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Multiple pads can drive the same module input pin, and a daisy chain
register is used to select the active input path. This patch defines
DAISY_OFFSET_IMX952 (0x460) and allows binding on i.MX952.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
* Fixing compiling MT8195 due to some independent changes that were applied
around the same time as MT8195 support was merged. (CI would not have caught
this since we didn't have a defconfig until now).
And few small features:
* New defconfig for MT8395/Genio 1200 EVK.
* pinctrl support for MT8189-compatible SoCs.
-----BEGIN PGP SIGNATURE-----
iQFKBAABCgA0FiEE7BjZnmIOg9ac2GiYwswgAf8Bj8AFAmmxzPMWHGRsZWNobmVy
QGJheWxpYnJlLmNvbQAKCRDCzCAB/wGPwPAoB/9EMEPdK1THUoNSD1kx1xBw76ga
Ln67miQBDln4xBT6ZYALB69RHqtSbhgRuRSJCQiY+PV8aTys29dMtLQ+l2NwZpXw
+YAM/EhQoUVEXmhQ0xS9wLhMUiiRK9vNa3eNROtT9fPLGh9ocPeduRt0GLukn7P8
jHAEa7AT4dQgHrW3QQv/3D47mB1DgHy5DRGbmoNeRdXPHTGlhTqE/qN/cCuKe0ob
l68FpQYJy8OPeS4/XrSqGED4haWbEI0CzrJhGVRLA/2D0QOJqzdDsN24EA1Q2IeI
h1VJk0urAO+ln9UizAoc9SUWYUJtYnwxtMLnfrAhRy+gmQtQs/EpmfWFDCNN
=SdGR
-----END PGP SIGNATURE-----
Merge tag 'mediatek-for-next-2026-03-11' of https://source.denx.de/u-boot/custodians/u-boot-mediatek into next
A fix:
* Fixing compiling MT8195 due to some independent changes that were applied
around the same time as MT8195 support was merged. (CI would not have caught
this since we didn't have a defconfig until now).
And few small features:
* New defconfig for MT8395/Genio 1200 EVK.
* pinctrl support for MT8189-compatible SoCs.
BCM2711 has different pull-up/down register values compared to BCM2835
- BCM2835: NONE=0, DOWN=1, UP=2
- BCM2711: NONE=0, UP=1, DOWN=2
This patch fixes the pull state register values for BCM2711.
Fixes: 2c39d975f87c ("pinctrl: bcm283x: Add GPIO pull-up/down control for BCM2835 and BCM2711")
Signed-off-by: Cibil Pankiras <cibil.pankiras@egym.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Add pinctrl support for mt8189.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Co-developed-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260209-mtk-pinctl-mt8189-v1-3-a7a3069eda6c@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Increase the maximum number of base addresses that can be handled by the
mediatek pinctrl driver from 10 to 15. This is needed for the MT8189
which has 15 base addresses.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260209-mtk-pinctl-mt8189-v1-2-a7a3069eda6c@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add pinctrl driver for RK3506.
Imported from vendor U-Boot linux-6.1-stan-rkr6 tag with adjustments
to use regmap_update_bits().
Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Aaron Griffith <aargri@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use syscon_regmap_lookup_by_phandle() to simplify the code.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
After years of developing the ADI ADSP platform, Timesys was purchased
by another company and is no longer contracted to maintain the platform.
Signed-off-by: Philip Molloy <philip.molloy@analog.com>
Reviewed-by: Greg Malysa <malysagreg@gmail.com>
The i.MX9 pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX9[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for printing pin names and current mux configuration on i.MX91
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX91
pads.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for printing pin names and current mux configuration on
i.MX93 when CMD_PINMUX is enabled.
- A full pin descriptor table for i.MX93 pads.
- Implementation of get_pins_count(), get_pin_name(), and
get_pin_muxing() in the i.MX9 pinctrl driver.
There is no good way to add real mux names, so just dump the function ID
from the mux register.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
We are going to add pinctrl data support for both i.MX93 and i.MX91.
Since these SoCs share the same pinctrl driver structure, rename
pinctrl-imx93.c to a more generic pinctrl-imx9.c and update all related
variable and function names accordingly.
This prepares the driver for supporting additional i.MX9 family SoCs.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The i.MX8M pinctrl match table currently lists all SoC compatibles
unconditionally, which may lead to unused entries being included when
building for specific SoC variants. Guard each compatible entry with
the corresponding CONFIG_IMX8M[X] option so only the required SoC
entries are compiled in, which reduces unnecessary data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for printing pin names and current mux configuration on i.MX8MQ
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MQ
pads.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for printing pin names and current mux configuration on i.MX8MM
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MM
pads.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for printing pin names and current mux configuration on i.MX8MN
when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MN
pads.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add support for printing pin names and current mux configuration on
i.MX8MP when CMD_PINMUX is enabled.
- imx_pinctrl_pin_desc structure and PINCTRL_PIN()/IMX_PINCTRL_PIN()
helpers for defining pin descriptors.
- A full pin descriptor table for i.MX8MP pads.
- Implementation of get_pins_count(), get_pin_name(), and
get_pin_muxing() in the i.MX8M pinctrl driver.
There is no good way to add real mux names, so just dump the function ID
from the mux register.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The hardware denies any access from the U-Boot non-secure world to the
secure-protected pins. Hence, prevent any driver to configure such a pin.
Identify the secure pins with "NO ACCESS" through the 'pinmux status -a'
command.
Use a driver data structure to identify which hardware versions support
this feature.
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The MT798x series SoCs have IES regiter definitions. They should
belong to the pinctrl v1 revision.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Add support for MT8195 pinctrl. The driver is based on the kernel one.
Signed-off-by: Chris-QJ Chen <chris-qj.chen@mediatek.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Peng Fan (OSS) <peng.fan@oss.nxp.com> says:
This patch set primarily removes unused DECLARE_GLOBAL_DATA_PTR
instances.
Many files declare DECLARE_GLOBAL_DATA_PTR and include
asm/global_data.h even though gd is never used. In these cases,
asm/global_data.h is effectively treated as a proxy header, which is
not a good practice.
Following the Include What You Use principle, files should include
only the headers they actually depend on, rather than relying on
global_data.h indirectly. This approach is also adopted in Linux kernel
[1].
The first few patches are prepartion to avoid building break after
remove the including of global_data.h.
A script is for filtering the files:
list=`find . -name "*.[ch]"`
for source in ${list}
do
result=`sed -n '/DECLARE_GLOBAL_DATA_PTR/p' ${source}`
if [ "${result}" == "DECLARE_GLOBAL_DATA_PTR;" ]; then
echo "Found in ${source}"
result=`sed -n '/\<gd\>/p' ${source}`
result2=`sed -n '/\<gd_/p' ${source}`
result3=`sed -n '/\<gd->/p' ${source}`
if [ "${result}" == "" ] && [ "${result2}" == "" ] && [ "${result3}" == "" ];then
echo "Cleanup ${source}"
sed -i '/DECLARE_GLOBAL_DATA_PTR/{N;/\n[[:space:]]*$/d;s/.*\n//;}' ${source}
sed -i '/DECLARE_GLOBAL_DATA_PTR/d' ${source}
sed -i '/global_data.h/d' ${source}
git add ${source}
fi
fi
done
[1] https://lpc.events/event/17/contributions/1620/attachments/1228/2520/Linux%20Kernel%20Header%20Optimization.pdf
CI: https://github.com/u-boot/u-boot/pull/865
Link: https://lore.kernel.org/r/20260209-cleanup-v2-0-73a3a84ddbdb@nxp.com
Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.
Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal <anshuld@ti.com> #TI boards
Acked-by: Yao Zi <me@ziyao.cc> #TH1520
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Although the pinctrl pm requests are implemented in the PMU firmware,
PM_QUERY_DATA is actually implemented in ATF. In SPL (or when running in
EL3), ATF is not yet running, so we need to implement this API
ourselves. Do the bare minimum, allowing SPL to enumerate functions, but
don't bother with groups. Groups take up a lot of space, and can be
emulated with pins. For example, a node like
display-port {
mux {
groups = "dpaux0_1";
function = "dpaux0";
};
};
can be replaced by
display-port {
mux {
pins = "MIO34", "MIO35", "MIO36", "MIO37";
function = "dpaux0";
};
};
While this isn't backwards-compatible with existing devicetrees, it's
more than enough for SPL where we may only need to mux one or two pins.
Add SPL_PINCTRL_ZYNQMP to ensure there's no SPL size growth when pinctrl
is enabled in U-Boot but isn't necessary for SPL. The only config this
would affect is Kria, but SPL_PINCTRL_GENERIC is disabled so
SPL_PINCTRL_ZYNQMP is not selected.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260129184011.3932790-1-sean.anderson@linux.dev
Add pinctrl driver for mt8188. The driver is based on the kernel driver.
Signed-off-by: Chris-QJ Chen <chris-qj.chen@mediatek.com>
Signed-off-by: Jill.Wu <shu-yun.wu@mediatek.com>
Signed-off-by: Vitor Sato Eschholz <vsatoes@baylibre.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Replace uclass_get_device_by_ofnode() with syscon_regmap_lookup_by_phandle()
to get the "mediatek,pctl-regmap" syscon device.
Depending on probe order, uclass_get_device_by_ofnode() may fail, but
syscon_regmap_lookup_by_phandle() has logic in it to handle that case
correctly.
The previous implementation could read more than one syscon if the
"mediatek,pctl-regmap" property had more than one phandle, but the one
board with a devicetree that does that is not supported in U-Boot yet,
so we can save that for later (it may never be needed).
Fixes: 424ceba18bfb ("pinctrl: mediatek: support mediatek,pctl-regmap property")
Signed-off-by: David Lechner <dlechner@baylibre.com>
Ignore the error return value from mtk_pinconf_bias_set_pupd_r1_r0().
The PUPD/R1/R0 registers only include a small subset of the pins, so
it is normal for this function to return an error for most pins.
Therefore, this error should not be propagated.
This fixes not all pins in a pinmux group being configured in some
cases because the propagated error caused the configuration loop to
exit early.
The rest of the function is refactored to return early on errors to
improve readability.
Signed-off-by: David Lechner <dlechner@baylibre.com>
Set the size of the reg_cals arrays to PINCTRL_PIN_REG_MAX to in all
affected mediatek pinctrl drivers. This is needed to avoid potential
out-of-bounds accesses when they is used in mtk_hw_pin_field_get().
All array members need to be initialized since the code loops from 0
to PINCTRL_PIN_REG_MAX - 1. mt7622_reg_cals was already defined this
way, but the others were not.
Signed-off-by: David Lechner <dlechner@baylibre.com>
Introduce a new Kconfig option PINCTRL_QCOM_GENERIC that, when selected,
enables all Qualcomm pinctrl drivers by default. This simplifies defconfigs
for platforms supporting multiple SoCs and avoids manual driver selection.
Individual drivers can still be disabled if required.
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260107154745.571319-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
