Apologies for the delay, but please pull those sunxi changes into
v2026.07. Nothing earth shattering, mostly minor improvements like
better SPL power LED support, and fixes to some H616 DRAM setup. Also
some more forward looking enhancement for the SPI code. I also pulled in
Richard's raw NAND flash improvements for the H6/H616 SoC, though this
lacks proper peer testing due to the lack of mainline support for any
board actually employing those chips.
No need to reset user data length registers in SPL.
In SPL, only the first user data length register is used, so we don't
need to reset all of them.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
In Allwinner SoCs, user data can be added in OOB before each ECC data.
For older SoCs like A10, the user data size was the size of a register
(4 bytes) and was mandatory before each ECC step.
So, the A10 OOB Layout is:
[4Bytes USER_DATA_STEP0] [ECC_STEP0 bytes]
[4bytes USER_DATA_STEP1] [ECC_STEP1 bytes]
...
NB: the BBM is stored at the beginning of the USER_DATA_STEP0.
Now, for H6/H616 NAND flash controller, this user data can have a
different size for each step.
So, we are maximizing the user data length to use as many OOB bytes as
possible.
Fixes: 7d1de9801151 ("mtd: rawnand: sunxi_spl: add support for H6/H616 nand controller")
Fixes: f163da5e6d26 ("mtd: rawnand: sunxi: add support for H6/H616 nand controller")
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
In sunxi_nand_chip_init there's quite a lot of kfree/return, it's easy
to forget a kfree(), so use a goto/kfree instead.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
[Andre: rename goto label, keep return 0;]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
In sunxi_nfc_hw_ecc_{read,write}_chunk(), the ECC step was force to 0,
the reason is not trivial to get when reading the code.
The explanation is that, from the NAND flash controller perspective, we
are indeed at step 0 for user data length and ECC errors.
Just add a const value with an explanation to clarify things.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
The user data length (4) used all over the code hard coded.
And sometimes, it's not that trivial to know that it's the user data
length and not something else.
Moreover, for the H6/H616 this value is no more fixed by hardware, but
could be modified.
Using a define here makes the code more readable.
Suggested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Once reset SPI TX or RX fifo, the underlying hardware need to take
some time to actually settle down, the two bits will automatically
clear to 0, so use a poll mechanism to check status bits to make sure
it's done correctly.
On Cubie A7A board which using A733 SoC, we encoutered a SPI nor flash
timeout issue, it turns out that the SPI fifo reset take a few time to
settle down, Add a loop to poll the status.
This was the error message shows on A7A board once this issue happened.
=> sf probe
ERROR: sun4i_spi: Timeout transferring data
Failed to initialize SPI flash at 0:0 (error -2)
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Boards based on the Allwinner D1/T113-s3, such as the
NetCube Systems Nagami, can expose a third I2C controller
on PG10/PG11. However, the sun20i_d1 pinctrl function table
lacked an entry for this mux.
Add the "i2c3" function with mux value 3 on PG10/PG11, allowing device
trees to enable the I2C3 controller.
Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
With CONFIG_OF_LIVE=y, dev_of_offset(dev) does not return a valid
flat-FDT offset, so fdtdec_get_int(gd->fdt_blob, offset, ...) inside
gen_74x164_probe() fails to locate the "registers-number" property and
always falls back to the default value of 1. This results in a 4-chip
74HC595 daisy chain being exposed as only 8 GPIOs instead of 32, and
any consumer referencing offsets >= 8 fails to bind with -ENOENT
("GPIO ... not found" / Error -22).
The "registers-default" property is ignored for the same reason, so
any configured power-on output pattern is silently discarded.
Replace the flat-FDT helpers with dev_read_u32_default() and
dev_read_u8_array_ptr(), which correctly walk both live and flat
trees. This matches how other DM GPIO drivers (e.g. pca953x_gpio.c)
read their per-device properties.
With gd->fdt_blob no longer referenced, also drop the now-unused
DECLARE_GLOBAL_DATA_PTR and <asm/global_data.h> include.
Tested on stm32mp153d-ssonic (CONFIG_OF_LIVE=y) with a 4-chip 74HC595
chain: all 32 GPIOs are now exposed, and 16 consumer LED nodes at
offsets 0..31 bind successfully.
Fixes: 9300f711baac ("dm: gpio: introduce 74x164 driver")
Signed-off-by: Chanhong Jung <happycpu@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The DS1307 driver depends on DM_RTC since commit d425d6056e01 ("rtc: Add
DM support to ds1307"), remove the related obsolete code.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for the Rocktech RK050HR345-CT106A RGB panel. This model
uses an Ilitek ILI9806E controller over the SPI bus for initialization
and register configuration only.
The driver is designed to be easily extensible to support other panels
with different sequences and timings by providing a specific descriptor
structure for each model.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The SPI IP in this platform is fully compatible with the current driver
implementation, requiring only a new compatible string.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Implement the set_wordlen operation to allow dynamic bus width
configuration. This is required for peripherals with non-standard
requirements, such as display panels that need 9-bit word transfers
during the initialization and setup phase.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a helper to check the SPE (SPI Enable) bit and replace the
open-coded bitwise check in stm32_spi_stopxfer() with this helper to
improve readability and consistency.
This is also a preparatory step for future driver updates that require
checking the SPI enable state across different code paths.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Remove redundant divisions by using the already available xferlen
variable for setting the rx/tx buffer lengths.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add the sandbox_spi_get_wordlen() public interface to retrieve the
internal word length state of the sandbox SPI device.
This is intended for use in sandbox SPI test cases to verify that
the word length is correctly propagated from the SPI uclass to
the driver.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
The driver currently ignores the word length configuration. Implement
the set_wordlen operation to store and track the current word length.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Allow dynamic configuration of the SPI word length. This is required
for controllers and slaves that need to operate with non-standard
word lengths, such as 9-bit wide transfers.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Fix the following errors yielded by Coverity Scan:
CID 644836: Error handling issues (CHECKED_RETURN)
Calling device_chld_unbind without checking return value (as is done elsewhere 6 out of 7 times)
CID 644834: Error handling issues (CHECKED_RETURN)
Calling device_chld_remove without checking return value (as is done elsewhere 4 out of 5 times).
Link: https://lore.kernel.org/r/20260309212331.GF1388590@bill-the-cat/
Fixes: a6d047c0a86b ("video: stm32: remove all child of DSI bridge when its probe failed")
Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add mt8195 support.
Support comes directly from commit e88edc977b00 ("soc: mediatek: pwrap:
add pwrap driver for MT8195 SoC") from the Linux Kernel.
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-8-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Fix mt8188_regs definition to use tabs instead of spaces for alignment
to be consistent with other definitions.
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-7-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Change the logic for selecting pmic_children_info to use the compatible
string from the devicetree instead of expecting the pwrap (part of the
MCU) to correspond to the separate PMIC chip.
In addition to being more correct, it also saves a few lines of code for
each MCU type that is added by dropping the enum and type field.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-6-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Remove the interrupt related code in mtk-pwrap driver. This was just
enabling interrupts without any handler.
Even if we did have a handler, the only thing we could do is log a
message. Since U-Boot isn't long running, this likely wouldn't be very
useful.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-5-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Drop the PWRAP_SLV_CAP_DUALIO flag from the mt6359 PMIC definition. The
mt6359p variant of the PMIC does support dual I/O.
Prior to this change, the driver would attempt to write to the
PWRAP_DEW_DIO_EN register, which was not defined, so would write
register 0 (DONE2).
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-4-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add a PWRAP_CAP_INIT capability flag to specify if it is safe to call
pwrap_init() or not. Not all targets define the registers accessed
by pwrap_init(). In that case, it is expected that an earlier bootloader
has already initialized the PMIC. If not, we now return an error instead
of trying to access undefined registers.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-3-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add a PWRAP_CAP_WDT_SRC flag to indicate if a PMIC wrapper has a WDT_SRC
or not. Then use this to conditionally enable the watchdog timer.
Prior to this change, since the register was not defined, it defaulted
to 0, so the wrong register (DONE2) was being written to.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-2-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Fix the comment at the start of the file to accurately describe what
this file does. The old description was likely copied from the related
regulator driver.
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-1-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Remove status register write procedure in probe(). This is handled in
spi-nor-core by the SPI_NOR_HAS_LOCK flag.
Signed-off-by: Meiker Gao <ot_meiker.gao@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-8-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Implement proper bounce buffer handling for the read path to fix zeroed
data when using DMA. In the bounce path, map the bounce buffer with
dma_map_single(), perform DMA using bounce_dma, then copy data from the
bounce buffer to the user buffer, and finally unmap with
dma_unmap_single().
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-7-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add support for some newer SOCs. New compatible strings are added to the
lookup table. Some SOCs also need a extra bit clocked out as a hardware
quirk, so a new capability structure and code is added to support that.
Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-6-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Add bounds checking of the various lengths in mtk_snor_cmd_program() to
prevent reading or writing registers out of bounds.
Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-5-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Rework mtk_snor_cmd_program() to avoid allocating a temporary buffer
for tx data. This improves performance a bit by avoiding the need to
allocate memory and copy data an extra time.
Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-2-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Correct the check condition in msdc_cmd_is_ready() for MSDC_PS_DAT0
polling. Without this change, it may not be able to detect if the SD
controller is busy correctly for issuing the command.
Fixes: d24b69395949 ("mmc: mtk-sd: add SD/MMC host controller driver for MT7623 SoC")
Signed-off-by: ht.lin <ht.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mmc-mtk-sd-fixes-v1-3-5b840c546af2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Enable the async_fifo_crcsts option for mediatek,mt8189-mmc compatible.
Without this option, writing will fail in HS200 mode.
Fixes: b3d16267b509 ("mmc: mtk-sd: add mediatek,mt8189-mmc compatible")
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mmc-mtk-sd-fixes-v1-2-5b840c546af2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Enable DMA on mediatek,mt8189-mmc compatible. The issue that was
preventing DMA from working correctly was fixed by the
get_effective_memsize() implementation in commit a7c682565b4b ("arm:
mediatek: add support of MT8189 SoC family").
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mmc-mtk-sd-fixes-v1-1-5b840c546af2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com> says:
This series replaces the SYNC_CACHE approach with FUA (Force Unit
Access) to prevent data loss during board resets while avoiding
system hangs during large sparse image flashing operations.
The previous SYNC_CACHE implementation caused timeouts and hangs
when flashing large sparse images because it issued cache sync
commands after every write operation. The FUA approach achieves
the same data integrity goal by setting the FUA bit in
WRITE10 commands.
Link: https://lore.kernel.org/r/20260416-enable_fua-v3-0-84508de2bfd9@oss.qualcomm.com
Enable the Force Unit Access (FUA) bit in SCSI WRITE10 commands to
ensure writes bypass the device's volatile cache and go directly to
non-volatile storage. This provides write-through behavior that prevents
data loss during board resets.
Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
While the SYNC_CACHE approach prevents data loss during board resets,
it causes system hangs during large sparse image flashing operations.
This will be replaced with a FUA (Force Unit Access) approach in future
commit, which achieves the same data integrity goal more efficiently.
This reverts commit ffe4e6ab42d2534302be825e49a2d085acf80f30.
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Quentin Schulz <foss+uboot@0leil.net> says:
This migrates the net options away from the main Kconfig to net/Kconfig,
rename the current NET option to NET_LEGACY to really highlight what it
is and hopefully encourage more people to use lwIP, add a new NET
menuconfig (but keep NO_NET as an alias to NET=n for now) which then
allows us to replace all the "if legacy_stack || lwip_stack" checks with
"if net_support" which is easier to read and maintain.
The only doubt I have is wrt SYS_RX_ETH_BUFFER which seems to be needed
for now even when no network is configured? Likely due to
include/net-common.h with PKTBUFSRX?
No change in behavior is intended. Only change in defconfig including
other defconfigs where NO_NET=y or NET is not set, in which case NO_NET
is not set or NET=y should be set in the top defconfig. Similar change
required for config fragments. See commit log in patch adding NET
menuconfig for details.
This was tested based on 70fd0c3bb7c2 ("x86: there is no
CONFIG_UBOOT_ROMSIZE_KB_12288"), from within the GitLab CI container
trini/u-boot-gitlab-ci-runner:noble-20251013-23Jan2026 and set up
similarly as in "build all platforms in a single job" GitLab CI job.
#!/usr/bin/env bash
set -o pipefail
set -eux
ARGS="-BvelPEWM --reproducible-builds --step 0"
./tools/buildman/buildman -o ${O} --force-build $ARGS -CE $*
./tools/buildman/buildman -o ${O} $ARGS -Ssd $*
O=../build/u-boot/ ../u-boot.sh -b master^..b4/net-kconfig |& tee ../log.txt
I can't really decipher the log.txt, but there's no line starting with
+ which would be an error according to tools/buildman/builder.py help
text. Additionally, because I started the script with set -e set and
because buildman has an exit code != 0 when it fails to build a board,
and I have the summary printed (which is the second buildman call), I
believe it means all builds passed.
The summary is the following:
aarch64: (for 537/537 boards) all +0.0 rodata +0.0
uniphier_v8 : all +1 rodata +1
u-boot: add: 0/0, grow: 1/0 bytes: 1/0 (1)
function old new delta
data_gz 10640 10641 +1
arm: (for 733/733 boards) all -0.0 rodata -0.0
uniphier_v7 : all -1 rodata -1
u-boot: add: 0/0, grow: 0/-1 bytes: 0/-1 (-1)
function old new delta
data_gz 11919 11918 -1
opos6uldev : all -3 rodata -3
u-boot: add: 0/0, grow: 0/-1 bytes: 0/-3 (-3)
function old new delta
data_gz 18778 18775 -3
uniphier_ld4_sld8: all -3 rodata -3
u-boot: add: 0/0, grow: 0/-1 bytes: 0/-3 (-3)
function old new delta
data_gz 11276 11273 -3
stemmy : all -20 rodata -20
u-boot: add: 0/0, grow: 0/-1 bytes: 0/-20 (-20)
function old new delta
data_gz 15783 15763 -20
As far as I could tell this data_gz is an automatically generated array
when CONFIG_CMD_CONFIG is enabled. It is the compressed .config stored
in binary form. Because I'm changing the name of symbols, replacing a
menu with a menuconfig, additional text makes it to .config and the
"# Networking" section in .config disappears.
Here is the diff for the 5 defconfigs listed above, generated with:
for f in build/*-m; do
diff --unified=0 $f/.config $(dirname $f)/$(basename -a -s '-m' $f)/.config
done
(-m is the build directory for master, and without the suffix, it's the
top commit of this series)
"""
--- build/opos6uldev-m/.config 2026-04-20 10:53:49.804528526 +0200
+++ build/opos6uldev/.config 2026-04-20 11:03:37.430242767 +0200
@@ -970,4 +969,0 @@
-
-#
-# Networking
-#
@@ -975,0 +972 @@
+CONFIG_NET_LEGACY=y
--- build/stemmy-m/.config 2026-04-20 11:01:33.653698123 +0200
+++ build/stemmy/.config 2026-04-20 11:04:53.452577311 +0200
@@ -733,4 +732,0 @@
-
-#
-# Networking
-#
@@ -738,2 +733,0 @@
-# CONFIG_NET is not set
-# CONFIG_NET_LWIP is not set
--- build/uniphier_ld4_sld8-m/.config 2026-04-20 11:00:41.605469071 +0200
+++ build/uniphier_ld4_sld8/.config 2026-04-20 11:04:22.226439899 +0200
@@ -997,4 +996,0 @@
-
-#
-# Networking
-#
@@ -1002,0 +999 @@
+CONFIG_NET_LEGACY=y
--- build/uniphier_v7-m/.config 2026-04-20 10:53:04.019307319 +0200
+++ build/uniphier_v7/.config 2026-04-20 11:03:01.688085486 +0200
@@ -1004,4 +1003,0 @@
-
-#
-# Networking
-#
@@ -1009,0 +1006 @@
+CONFIG_NET_LEGACY=y
--- build/uniphier_v8-m/.config 2026-04-20 10:43:05.614441175 +0200
+++ build/uniphier_v8/.config 2026-04-20 10:41:03.214852130 +0200
@@ -875,4 +874,0 @@
-
-#
-# Networking
-#
@@ -880,0 +877 @@
+CONFIG_NET_LEGACY=y
"""
This is fine:
- Networking menu doesn't exist anymore so "#\n# Networking\n#\n" won't
be in .config anymore.
- opos6uldev, uniphier_ld4_sld8, uniphier_v7 and uniphier_v8 all have
(old) CONFIG_NET enabled, (new) CONFIG_NET will still be set but
CONFIG_NET_LEGACY also needs to be defined now to reflect the stack
choice (even if default),
- stemmy has CONFIG_NO_NET set, which means CONFIG_NET and
CONFIG_NET_LWIP are not reachable anymore hence why they don't need to
be part of .config,
GitLab CI was run on this series (well, not exactly, but it's only
changes to the git logs that were made):
https://source.denx.de/u-boot/contributors/qschulz/u-boot/-/pipelines/29849
It passes.
Link: https://lore.kernel.org/r/20260420-net-kconfig-v1-0-9900002d8e72@cherry.de
Since the move to make NET a menuconfig and NO_NET a synonym of NET=n,
when NET is enabled, NET_LEGACY || NET_LWIP is necessarily true, so
let's simplify the various checks across the codebase.
SPL_NET_LWIP doesn't exist but SPL_NET_LEGACY is an alias for SPL_NET so
the proper symbol is still defined in SPL whenever needed.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Highlight that NET really is the legacy networking stack by renaming the
option to NET_LEGACY.
This requires us to add an SPL_NET_LEGACY alias to SPL_NET as otherwise
CONFIG_IS_ENABLED(NET_LEGACY) will not work for SPL.
The "depends on !NET_LWIP" for SPL_NET clearly highlights that it is
using the legacy networking app so this seems fine to do.
This also has the benefit of removing potential confusion on NET being a
specific networking stack instead of "any" network stack.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some virtio implementations may forward the virtio requests directly to
the underlying hw. The hw may have some restrictions in how many and how
big the requests can be. Therefore, the corresponding virtio device will
announce this limitations with the SIZE_MAX & SEG_MAX feature.
Add support for those features. Split an io request into multiple virtio
requests if more than seg_max segments would be used. Also split a
single buffer request into multiple segments if the buffer is bigger
then size_max.
Signed-off-by: Christian Pötzsch <christian.poetzsch@kernkonzept.com>
Signed-off-by: Adam Lackorzynski <adam@l4re.org>
Currently the implementation does not just skip all devices beside
device 0, it also skips all functions (besides 0) on device 0. This
broke basically all AMD platforms, since they have a lot of internal SOC
devices behind these functions.
This was detected, because the XHCI controller and therefore the USB
devices were not found by u-boot on AMD/crater platform.
PCI_MASK_BUS() returns both device and function bits, so it skips any
bdf where either device > 0 or function > 0. Using PCI_DEV() extracts
only the device number, matching the intent in only_one_child().
It therefore now checks all functions on device 0 (Linux does the same).
I build tested u-boot as coreboot payload and run it on a recent x86 AMD
platform. Devices like the XHCI controller are now found again.
Fixes: fbde868ba4aa ("pci: skip unnecessary PCIe scanning")
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Andrew Goodbody <andrew.goodbody@linaro.org>
CC: George McCollister <george.mccollister@konsulko.com>
CC: Simon Glass <sjg@chromium.org>
Various Qualcomm additions this cycle:
* USB superspeed support for 1 platform
* Initial support for the Milos platform and the Fairphone Gen 6
(chainloaded from ABL)
* Improved support for booting with OP-TEE on supported platforms
* Initial basic power domain support
Notably there is a generic change to the device core, missing power
domains will no longer cause a device to fail probe and instead will
just print a warning. This shouldn't affect any existing platforms.
