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Import cvmx-pko3-resources.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
214 lines
6.6 KiB
C
214 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018-2022 Marvell International Ltd.
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*
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* PKO resources.
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*/
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#include <errno.h>
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#include <log.h>
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#include <time.h>
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#include <linux/delay.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-csr.h>
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#include <mach/cvmx-bootmem.h>
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#include <mach/octeon-model.h>
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#include <mach/cvmx-fuse.h>
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#include <mach/octeon-feature.h>
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#include <mach/cvmx-qlm.h>
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#include <mach/octeon_qlm.h>
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#include <mach/cvmx-pcie.h>
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#include <mach/cvmx-coremask.h>
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#include <mach/cvmx-range.h>
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#include <mach/cvmx-global-resources.h>
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#include <mach/cvmx-agl-defs.h>
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#include <mach/cvmx-bgxx-defs.h>
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#include <mach/cvmx-ciu-defs.h>
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#include <mach/cvmx-gmxx-defs.h>
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#include <mach/cvmx-gserx-defs.h>
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#include <mach/cvmx-ilk-defs.h>
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#include <mach/cvmx-ipd-defs.h>
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#include <mach/cvmx-pcsx-defs.h>
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#include <mach/cvmx-pcsxx-defs.h>
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#include <mach/cvmx-pki-defs.h>
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#include <mach/cvmx-pko-defs.h>
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#include <mach/cvmx-xcv-defs.h>
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#include <mach/cvmx-hwpko.h>
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#include <mach/cvmx-ilk.h>
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#include <mach/cvmx-pki.h>
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#include <mach/cvmx-pko3.h>
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#include <mach/cvmx-pko3-queue.h>
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#include <mach/cvmx-pko3-resources.h>
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#include <mach/cvmx-helper.h>
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#include <mach/cvmx-helper-board.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-bgx.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-util.h>
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#include <mach/cvmx-helper-pki.h>
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#define CVMX_GR_TAG_PKO_PORT_QUEUES(x) \
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cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'p', 'o', 'q', '_', \
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((x) + '0'), '.', '.', '.', '.')
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#define CVMX_GR_TAG_PKO_L2_QUEUES(x) \
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cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'l', '2', 'q', '_', \
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((x) + '0'), '.', '.', '.', '.')
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#define CVMX_GR_TAG_PKO_L3_QUEUES(x) \
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cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'l', '3', 'q', '_', \
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((x) + '0'), '.', '.', '.', '.')
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#define CVMX_GR_TAG_PKO_L4_QUEUES(x) \
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cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'l', '4', 'q', '_', \
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((x) + '0'), '.', '.', '.', '.')
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#define CVMX_GR_TAG_PKO_L5_QUEUES(x) \
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cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'l', '5', 'q', '_', \
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((x) + '0'), '.', '.', '.', '.')
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#define CVMX_GR_TAG_PKO_DESCR_QUEUES(x) \
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cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'd', 'e', 'q', '_', \
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((x) + '0'), '.', '.', '.', '.')
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#define CVMX_GR_TAG_PKO_PORT_INDEX(x) \
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cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'p', 'i', 'd', '_', \
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((x) + '0'), '.', '.', '.', '.')
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/*
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* @INRWENAL
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* Per-DQ parameters, current and maximum queue depth counters
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*/
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cvmx_pko3_dq_params_t *__cvmx_pko3_dq_params[CVMX_MAX_NODES];
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static const short cvmx_pko_num_queues_78XX[256] = {
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[CVMX_PKO_PORT_QUEUES] = 32, [CVMX_PKO_L2_QUEUES] = 512,
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[CVMX_PKO_L3_QUEUES] = 512, [CVMX_PKO_L4_QUEUES] = 1024,
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[CVMX_PKO_L5_QUEUES] = 1024, [CVMX_PKO_DESCR_QUEUES] = 1024
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};
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static const short cvmx_pko_num_queues_73XX[256] = {
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[CVMX_PKO_PORT_QUEUES] = 16, [CVMX_PKO_L2_QUEUES] = 256,
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[CVMX_PKO_L3_QUEUES] = 256, [CVMX_PKO_L4_QUEUES] = 0,
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[CVMX_PKO_L5_QUEUES] = 0, [CVMX_PKO_DESCR_QUEUES] = 256
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};
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int cvmx_pko3_num_level_queues(enum cvmx_pko3_level_e level)
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{
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unsigned int nq = 0, ne = 0;
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if (OCTEON_IS_MODEL(OCTEON_CN78XX)) {
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ne = NUM_ELEMENTS(cvmx_pko_num_queues_78XX);
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nq = cvmx_pko_num_queues_78XX[level];
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}
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if (OCTEON_IS_MODEL(OCTEON_CN73XX) || OCTEON_IS_MODEL(OCTEON_CNF75XX)) {
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ne = NUM_ELEMENTS(cvmx_pko_num_queues_73XX);
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nq = cvmx_pko_num_queues_73XX[level];
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}
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if (nq == 0 || level >= ne) {
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printf("ERROR: %s: queue level %#x invalid\n", __func__, level);
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return -1;
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}
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return nq;
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}
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static inline struct global_resource_tag
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__cvmx_pko_get_queues_resource_tag(int node, enum cvmx_pko3_level_e queue_level)
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{
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if (cvmx_pko3_num_level_queues(queue_level) == 0) {
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printf("ERROR: %s: queue level %#x invalid\n", __func__,
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queue_level);
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return CVMX_GR_TAG_INVALID;
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}
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switch (queue_level) {
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case CVMX_PKO_PORT_QUEUES:
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return CVMX_GR_TAG_PKO_PORT_QUEUES(node);
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case CVMX_PKO_L2_QUEUES:
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return CVMX_GR_TAG_PKO_L2_QUEUES(node);
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case CVMX_PKO_L3_QUEUES:
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return CVMX_GR_TAG_PKO_L3_QUEUES(node);
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case CVMX_PKO_L4_QUEUES:
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return CVMX_GR_TAG_PKO_L4_QUEUES(node);
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case CVMX_PKO_L5_QUEUES:
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return CVMX_GR_TAG_PKO_L5_QUEUES(node);
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case CVMX_PKO_DESCR_QUEUES:
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return CVMX_GR_TAG_PKO_DESCR_QUEUES(node);
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default:
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printf("ERROR: %s: queue level %#x invalid\n", __func__,
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queue_level);
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return CVMX_GR_TAG_INVALID;
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}
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}
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/**
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* Allocate or reserve a pko resource - called by wrapper functions
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* @param tag processed global resource tag
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* @param base_queue if specified the queue to reserve
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* @param owner to be specified for resource
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* @param num_queues to allocate
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* @param max_num_queues for global resource
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*/
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int cvmx_pko_alloc_global_resource(struct global_resource_tag tag,
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int base_queue, int owner, int num_queues,
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int max_num_queues)
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{
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int res;
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if (cvmx_create_global_resource_range(tag, max_num_queues)) {
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debug("ERROR: Failed to create PKO3 resource: %lx-%lx\n",
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(unsigned long)tag.hi, (unsigned long)tag.lo);
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return -1;
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}
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if (base_queue >= 0) {
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res = cvmx_reserve_global_resource_range(tag, owner, base_queue,
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num_queues);
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} else {
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res = cvmx_allocate_global_resource_range(tag, owner,
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num_queues, 1);
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}
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if (res < 0) {
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debug("ERROR: Failed to %s PKO3 tag %lx:%lx, %i %i %i %i.\n",
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((base_queue < 0) ? "allocate" : "reserve"),
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(unsigned long)tag.hi, (unsigned long)tag.lo, base_queue,
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owner, num_queues, max_num_queues);
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return -1;
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}
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return res;
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}
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/**
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* Allocate or reserve PKO queues - wrapper for cvmx_pko_alloc_global_resource
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*
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* @param node on which to allocate/reserve PKO queues
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* @param level of PKO queue
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* @param owner of reserved/allocated resources
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* @param base_queue to start reservation/allocatation
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* @param num_queues number of queues to be allocated
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* @return 0 on success, -1 on failure
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*/
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int cvmx_pko_alloc_queues(int node, int level, int owner, int base_queue,
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int num_queues)
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{
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struct global_resource_tag tag =
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__cvmx_pko_get_queues_resource_tag(node, level);
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int max_num_queues = cvmx_pko3_num_level_queues(level);
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return cvmx_pko_alloc_global_resource(tag, base_queue, owner,
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num_queues, max_num_queues);
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}
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/**
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* @INTERNAL
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*
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* Initialize the pointer to the descriptor queue parameter table.
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* The table is one named block per node, and may be shared between
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* applications.
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*/
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int __cvmx_pko3_dq_param_setup(unsigned int node)
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{
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return 0;
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}
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