Yao Zi 3dbff9eecc riscv: lib: Split out support for T-Head cache management operations ... Designed before a standard set of cache management operations defined in RISC-V, earlier T-Head cores like C906 and C910 provide CMO through the customized extension XTheadCMO, which has been used in the CV1800B port of U-Boot. This patch splits XTheadCMO-related code into a generic module, allowing SoCs shipping T-Head cores to share the code. Link: https://github.com/XUANTIE-RV/thead-extension-spec Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>		2025-05-21 16:49:52 +08:00
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cpu	riscv: lib: Split out support for T-Head cache management operations	2025-05-21 16:49:52 +08:00
dts	riscv: dts: jh7110: override syscrg assigned clock rates with defaults	2025-05-21 16:49:44 +08:00
include/asm	riscv: insn-def.h: Fix header guard	2025-05-21 16:49:30 +08:00
lib	riscv: lib: Split out support for T-Head cache management operations	2025-05-21 16:49:52 +08:00
config.mk	riscv: Support building with Clang	2024-01-31 16:52:36 +08:00
Kconfig	riscv: lib: Split out support for T-Head cache management operations	2025-05-21 16:49:52 +08:00
Makefile	Kbuild: Always use $(PHASE_)	2025-04-11 12:16:44 -06:00