Bo Gan e6b7aeef3d riscv: dts: jh7110: Enable PLL node in SPL ...

Previously PLL node was missing from SPL dts. This caused BUS_ROOT
to stay on OSC clock (24Mhz). As a result, all peripherals have to
run at a much lower frequency, and loading from sdcard/emmc is slow.
Thus, enabling PLL node in dts to fix this.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

2024-03-12 14:36:13 +08:00

..

cpu

riscv: cpu: improve multi-letter extension detection in supports_extension()

2024-03-12 14:36:13 +08:00

dts

riscv: dts: jh7110: Enable PLL node in SPL

2024-03-12 14:36:13 +08:00

include/asm

cmd: sbi: add support for Debug Trigger Extension

2024-01-31 16:52:30 +08:00

lib

riscv: separate .data and .text sections of EFI binaries

2024-01-29 11:30:10 +01:00

config.mk

riscv: Support building with Clang

2024-01-31 16:52:36 +08:00

Kconfig

riscv: sophgo: milkv_duo: initial support added

2024-01-31 16:52:45 +08:00

Makefile

riscv: Add Zbb support for building U-Boot

2023-10-19 17:29:50 +08:00