The Cadence TTC has 3 channels that can each be used for PWM functions.
Ensure that the array has sufficient elements to avoid a possible memory
access overrun. Use a macro to keep the array size and limit checks in
sync so adjust checks to work with this.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Link: https://lore.kernel.org/r/20250901-cadence_pwm-v1-1-140b04cd73a9@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
fe8d071c49