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PolarFire SoC needs a custom implementation of top_of_ram(), so stop using the generic CPU & create a custom CPU instead. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
38 lines
1.0 KiB
C
38 lines
1.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <asm/global_data.h>
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#include <fdtdec.h>
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#include <init.h>
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#include <linux/sizes.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define MPFS_TOP_OF_CACHED (SZ_2G + SZ_1G)
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#define MPFS_HSS_RESERVATION (SZ_4M)
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int dram_init(void) {
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return fdtdec_setup_mem_size_base();
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}
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int dram_init_banksize(void) {
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return fdtdec_setup_memory_banksize();
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}
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phys_size_t board_get_usable_ram_top(phys_size_t total_size) {
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/*
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* Ensure that if we run from 32-bit memory that all memory used by
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* U-Boot is cached addresses, but also account for the reservation at
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* the top of 32 bit cached DDR used by the HSS.
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*/
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if (gd->ram_top >= MPFS_TOP_OF_CACHED - MPFS_HSS_RESERVATION)
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return MPFS_TOP_OF_CACHED - MPFS_HSS_RESERVATION - 1;
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/*
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* If we don't find a 32 bit region just return the top of memory.
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* If the address is a 32-bit region, but fits beneath the HSS'
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* reservation, ram_top is adequate also.
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*/
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return gd->ram_top;
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} |