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u-boot/arch/riscv
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Heinrich Schuchardt dd0ad45920 RISC-V: implement private GCC library 
The following functions are provided:

Count leading zero bits

* int __clzsi2 (unsigned int a)
* int __clzdi2 (unsigned long a)
* int __clzti2 (unsigned long long a)

Count trailing zero bits

* int __ctzsi2 (unsigned int a)
* int __ctzdi2 (unsigned long a)
* int __ctzti2 (unsigned long long a)

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-12-08 12:10:55 +08:00
..
cpu
riscv: mpfs: move SoC level options to the CPU Kconfig
2025-12-08 12:10:43 +08:00
dts
configs: Change default baud rate to 115200
2025-12-08 12:10:17 +08:00
include/asm
riscv: create a custom CPU implementation for PolarFire SoC
2025-12-08 12:10:39 +08:00
lib
RISC-V: implement private GCC library
2025-12-08 12:10:55 +08:00
config.mk
riscv: add build support for big-endian
2025-07-03 18:10:50 +08:00
Kconfig
riscv: create a custom CPU implementation for PolarFire SoC
2025-12-08 12:10:39 +08:00
Makefile
riscv: Add Kconfig options to distinguish Zaamo and Zalrsc
2025-09-19 19:22:29 +08:00