The GPIOs on PM6350 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button Fairphone 4 smartphone.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Add the pm6150l regulator data found on the Qualcomm SM6350 platform.
The tables are imported from the Linux driver. The SMPS regulators were
not added now.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
The UFS on SM6350 can reuse the SDM845 configuration, just like in
Linux.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
This SoC doesn't have the generic compatible.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on SM6350 SoC, with support for special pins.
Correct pin configuration is required for working debug UART and eMMC/SD
cards.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Add Clock driver for the GCC block found in the SM6350 SoC.
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
The previous description "Qualcomm snapdragon" barely tells the user
anything, update the name so that it's clear which configs the user can
choose between, namely the older QUP driver, or the newer GENI driver.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-3-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
There's no WEST, SOUTH or NORTH in sc7280 pinctrl. Fix the offset of the
ufs_reset pin.
Fixes: 51ec7fdb64b ("pinctrl: qcom: add sc7280 pinctrl driver")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-1-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
This is used for the volume keys on some SDM670 devices.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-5-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
The global clock controller on SDM670 is similar to SDM845, so let's add
support here.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-2-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
Necessary for MMC to successfully probe all clocks.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: David Wronek <david.wronek@mainlining.org>
Link: https://lore.kernel.org/r/20251003-sdm670-v2-1-52c0fa481286@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
This PHY driver is required by USB_EHCI_MSM and not useful on its own.
Rather than have it be a prompted option, it should (and currently is)
select'd by USB_EHCI_MSM. Remove the prompt for this option and then
correct the dependency chain (it must select PHY).
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20251003203927.1030052-1-trini@konsulko.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
Add support for the GPIOs in the PM6150L to the new driver.
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20251005154443.71477-1-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
This reverts commit 644b4650ee57c429bede77f44752cc867dac0e00.
While the intention of the above commit is correct, it leads to test
failures in CI that need to be addressed at the same time.
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver references the get_timer macro while relying on an
indirection inclusion of <time.h>. Add the missing include directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
A few spi drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
A few clock drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
There is nothing x86-centric in this include file, and moving it will
allow for some drivers to be compile-tested on sandbox.
Signed-off-by: Tom Rini <trini@konsulko.com>
When printing the contents of an lbaint_t variable we need to use LBAF
to print it in order to get the correct format type depending on 32 or
64bit-ness.
Signed-off-by: Tom Rini <trini@konsulko.com>
When printing the contents of an size_t variable we need to use z prefix
to the format character in order to get the correct format type
depending on 32 or 64bit-ness.
Signed-off-by: Tom Rini <trini@konsulko.com>
This feature requires that CFG_SYS_FLASH_BASE is defined and this in
turn is only done in the case of FLASH_CFI_DRIVER && !CFI_FLASH or in
other words, when DM_MTD is not enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
In nand_wait_ready there is a loop that includes a NULL check for
chip->dev_ready before it is dereferenced. Use a NULL check once the
loop is exited as well to cover the case where it exits due to a timeout
and it is therefore not known if chip->dev_ready is NULL or not.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
In _spi_get_bus_and_cs the check for stacked parallel support needing
multiple chip select support does a direct return on error. Instead it
should set the error code in ret and then use the unwind goto.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In erratum_err050568 the test for apllicability uses logical or to check
multiple chip IDs but this means the test will always evaluate to true
as at least 1 term will always be true. Logical and should have been
used so that the expression evaluates to true if all terms are true
which would mean that no chip ID of interest was in use.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In npcm_fiu_uma_operation to enter a code block nbytes must be non-zero.
So testing for nbytes inside the code block is redundant and can be
removed.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In ich_spi_exec_op_swseq the variable with_address is only assigned a
value in the case of op->addr.nbytes being non-zero.
Initialise with_address to zero. so that it is always valid.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In clk_set_default_get_by_id ret is passed to ERR_PTR but nothing is
done with the value that this calculates which is obviously not the
intention of the code. This is confirmed by the code around where this
function is called.
Instead return the value from ERR_PTR.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Andrew Goodbody <andrew.goodbody@linaro.org> says:
Should return value calculated by ERR_PTR as calling code attempts to
check for it.
Also do not dereference a pointer that could be an error pointer before
checking it with IS_ERR.
Link: https://lore.kernel.org/r/20250723-clk_versaclock-v1-0-9d70f2530871@linaro.org
In owl_mmc_prepare_data there is a NULL check for the pointer data but
it happens after data has already been dereferenced. Refactor the code
so that the NULL check happens before any code dereferences data.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In intel_gpio_set_flags the two variables or0 and or1 may be used
uninitialised. Correct this by setting initial values in the
declaration.
Also there is no need to use '|=' when the initial value is 0 and there
is only one assignment performed to each variable so just use '='
instead.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In spi_calibration if the low range fails to calibrate then the code
attempted to return the variable err but this has not been set in this
case. Instead just return -EIO.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In cadence_qspi_apb_exec_flash_cmd the test for a timeout uses a
post-decrement on the variable retry which will result in a value of -1
after the loop exit, or it would if the variable were signed.
To fix this make retry a signed variable and test its value for being
equal to -1.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In versaclock_probe vc5->pin_xin may be an error pointer so need to
check with IS_ERR before attempting to dereference it.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
In versaclock_get_name -ENOMEM is passed to ERR_PTR but nothing is
done with the value that this calculates which is obviously not the
intention of the code. This is confirmed by the code around where this
function is called.
Instead return the value from ERR_PTR.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
A device-tree property is already defined to indicate that the internal
PHY should be used with active-low leds, which corresponds to a
specific bit in the dedicated syscon register.
Add support for setting this bit when the property is present.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
We know about all the relevant fields in the syscon register so there
is no reason to read it first and modify it.
Build the register from scratch instead, with all relevant fields set.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
This protocol allows an agent to start, stop a CPU or set reset vector.
It is used to manage auxiliary CPUs in an LM (e.g. additional cores in an
AP cluster).
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Add Logical Machine Management(LMM) protocol which is intended for boot,
shutdown, and reset of other logical machines (LM). It is usually used to
allow one LM to manager another used as an offload or accelerator engine.
Following Linux Kernel, created a separate folder for holding vendor
protocol drivers.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Preparing to add i.MX LMM and CPU protocol driver, support probe SCMI
vendor ID 0x80(i.MX SCMI LMM ID) and 0x82(i.MX SCMI CPU ID). And use
Kconfig option to support conditional compilation.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Add conditional compilation for SCMI protocol support in scmi_get_protocol()
and scmi_add_protocol() based on corresponding Kconfig options. This ensures
that only the enabled protocols are compiled and accessed, and reducing binary
size.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Move the SERDES configuration check after clock and reset initialization
and change it from a hard failure to a skip of WIZ initialization. This
allows the driver to probe successfully when the SERDES has been
pre-configured by a previous boot stage (e.g., ROM or SPL).
This approach aligns with how the Linux kernel handles pre-configured
SERDES, where the driver gracefully skips reinitialization rather than
failing to probe.
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Pull request net-20251022
net:
- airoha: improvements
- Tighten a few more driver dependencies
- designware: fix bitbang init error
- phy: Make driver overloading get_phy_id depend on !COMPILE_TEST
- phy: add paged PHY register accessors
- make dhcp_run() common for NET and NET_LWIP
- dwc_eth_ops: Correct check for FDT_64BIT
- mediatek: mt7988: various fixup + MDIO detach
- phy: aquantia: switch to use phy_get_ofnode(), fix bindings typo
net-legacy:
- bootp: Prevent buffer overflow to avoid leaking the RAM content
- tftp: make TFTP ports unconditionally configurable
misc:
- uthreads: Make use of CONFIG_IS_ENABLED consistently
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Merge tag 'u-boot-at91-2026.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91
First set of u-boot-at91 features for the 2026.01 cycle:
This small fixes set includes a change on clocks register value and a
fix for the sam9x60ek default timer.
The Synchronous Abort and reset errors occurred due
to incorrect parameter passing during initialization.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
[jf: add missing #if IS_ENABLED(CONFIG_BITBANGMII)]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
With commit 597fe041a85f ("net/phy: enable get_phy_id redefinable") we
made get_phy_id a public but weak function, so that PHY drivers that had
required non-standard ways of getting the PHY ID could be supported.
However, overloading a weak function multiple times is (rightly) a link
error. At this point, we have two PHYs which make use of this feature,
so make both of them only available when COMPILE_TEST is unset, as part
of being able to support "allyesconfig" in the future.
Signed-off-by: Tom Rini <trini@konsulko.com>
Synchronize paged PHY helpers with Linux v6.17.
Add support for PHY devices that use paged register access by
implementing the following functions:
- phy_save_page(): Save current page number
- phy_select_page(): Switch to a specific page and return previous page
- phy_restore_page(): Restore previously saved page
Also adds read_page and write_page callbacks to the phy_driver
structure to enable driver-specific page handling.
These helpers allow safe access to paged PHY registers by ensuring
proper page selection and restoration,
even in error conditions, which will be used by the Airoha PHY driver.
Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
