Fix boot log output not being rendered correctly, fix
it doing the same as done in verdin-am62.rst.
Fixes: b8c43968b801 ("board: toradex: add verdin am62p support")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Document the image preparation and flashing techniques for
Exynos7870-based boards. This is done in a separate file in a
sub-directory, which is linked back to the main documentation.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add support for a generic platform which intends to support multiple
boards powered by ARMv8 Samsung Exynos SoCs. Some important features
include:
* Fastboot: This is present to provide an open alternative to Samsung's
proprietary Odin protocol. The board file configures certain features
for fastboot, such as a dynamically allocated fastboot buffer, and
standardized (lowercase) partition aliases.
* EFI: Kernel image can be loaded from an EFI partition. This
adopts a standard booting process, which multiple OS distributions
can rely on.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
As stated in PXELINUX doc [1], the PXE configuration file has to be in
the format of "01-MAC-address" for Ethernet connections:
The hardware type (using its ARP "htype" code) and address, all in
lowercase hexadecimal with dash separators. For example, for an
Ethernet (i.e. ARP hardware type "1") with address
"88:99:AA:BB:CC:DD", it would search for the filename
"01-88-99-aa-bb-cc-dd".
Indeed, PXE implementation in U-Boot looks for files like that, as can
be seen from this call chain:
format_mac_pxe()
pxe_mac_path()
pxe_get()
extlinux_pxe_read_bootflow()
Mention the fact that PXE expects the configuration file to be prepended
with "01" in the PXE section of E850-96 documentation. While at it, fix
some other minor issues in PXE section.
[1] https://wiki.syslinux.org/wiki/index.php?title=PXELINUX
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
The SPL_TEXT_BASE for AM62x SiP is set as 0x82000000 whereas the
documentation states 0x81880000 as the PRELOADED_BL33_BASE value.
Both should match to allow TFA to jump to the address where A53 SPL has
been loaded.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Update the TI firmware repository URL from git.ti.com to the
GitHub mirror at github.com/TexasInstruments/ti-linux-firmware
which is much more reliable.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reported-by: Tom Rini <trini@konsulko.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The LVDS Display Interface Transmitter handles the LVDS protocol:
it maps the pixels received from the upstream Pixel-DMA (LTDC)
onto the LVDS PHY.
The LVDS controller driver supports the following high-level features:
• FDP-Link-I and OpenLDI (v0.95) protocols
• Single-Link or Dual-Link operation
• Single-Display or Double-Display (with the same content
duplicated on both)
• Flexible Bit-Mapping, including JEIDA and VESA
• RGB888 or RGB666 output
• Synchronous design, with one input pixel per clock cycle
• No resolution limitation.
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Anshul Dalal <anshuld@ti.com> says:
This patch series adds support for AM6254atl SiP (or AM62x SiP for
short) to U-Boot.
The OPN (Orderable Part Number) 'AM6254atl' expands as follows[1]:
AM6254atl
||||
|||+-- Feature Lookup (L indicates 512MiB of integrated LPDDR4)
||+--- Device Speed Grade (T indicates 1.25GHz on A53 cores)
|+---- Silicon PG Revision (A indicates SR 1.0)
+----- Core configuration (4 indicates A53's in Quad core config)
AM62x SiP provides the existing AM62x SoC with 512MiB of DDR
integrated in a single packages. The first 4 patches in the series
are cherry-picked from the devicetree-rebasing repository at
'v6.18-rc2-dts'.
Link: https://lore.kernel.org/r/20251025-62sip_support-v3-0-b4c8314d0055@ti.com
TI's AM6254atl (or AM62x SiP for short) provides the existing AM62x SoC
with 512MiB of DDR integrated in a single package.
This patch adds the necessary U-Boot devie tree files, the required
defconfigs along with the documentation for the AM62x SiP EVM.
AM62x SiP differs from the already supported AM62x in following ways:
- OP-TEE for the AM62x resides from 0x9e800000 to 0xa0000000 which needs
to be moved to 0x80080000 to free up space at end of DDR in AM62x SiP
with 512MiB of memory. This is required to allow U-Boot to relocate to
end of DDR before booting to the kernel.
- Changes to the env:
1. splashimage address updated from 0x80200000 to 0x81a00000
2. DFU addresses updated to match updated TEXT_BASE for SPL and U-Boot
Signed-off-by: Anshul Dalal <anshuld@ti.com>
This patch adds user documentation for R5 falcon mode for AM62
platforms. The main section is added to am62x_sk.rst and other documents
just include the relevant sections. Steps to build falcon support, usage
and the modified R5 memory map have been documented.
Two svg images have also been added for reference, one for the modified
tifalcon.bin and other for the fitImage format specific to R5 falcon
mode.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Add boot support and peripherals like eMMC/SD, UART, I2C, GPIO, ENETC0/1
and PCIE0/1 for iMX95 15x15 LPDDR4X EVK.
Updated doc for build instructions.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add guide on how to use the Remote Processors on i.MX8M and i.MX93.
Update MAINTAINERS to include doc/board/nxp.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
readme was missing instructions to build M2B. Now added.
Signed-off-by: Andrea Calabrese <andrea.calabrese@amarulasolutions.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support for MNT Reform2, it works as a carrier board
with a Firefly iCore-3588Q SoM.
Specification:
- Rockchip RK3588
- LPDDR5X 16/32 GB
- eMMC 128/256 GB
- HDMI Type A out x 1
- USB 3.0 Host x 1
- USB-C 3.0 with DisplayPort AltMode
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- DSI to eDP panel
- 1Gb Ethernet w/ Microchip KSZ9310 PHY
Tested using Fedora boot on USB stick and eMMC.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Sige1 is a single board computer developed by ArmSoM, based on the
Rockchip RK3528A SoC.
Add support for the ArmSoM Sige1 board.
Features tested on a ArmSoM Sige1 v1.1:
- SD-card boot
- eMMC boot
- Ethernet
- USB host (with pending DT changes)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The ROCK 2 Family is a high-performance SBC (Single Board Computer)
developed by Radxa, based on the Rockchip RK3528A.
The Radxa E20C shares some board characteristics with the ROCK 2 family
boards.
Add support for the ROCK 2A and 2F boards. The radxa-e20c-rk3528 target
is also extended to support booting ROCK 2 boards.
Features tested on a ROCK 2A v1.202:
- SD-card boot
- Ethernet
- USB host (with pending DT changes)
Features tested on a ROCK 2F v1.016:
- SD-card boot
- eMMC boot
- USB host (with pending DT changes)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Luckfox Omni3576 Carrier Board with Core3576 Module, powered by the
Rockchip RK3576 SoC with four Cortex-A72 cores, four Cortex-A53 cores,
and a Mali-G52 MC3 GPU.
Features tested with a Core3576 Rev1.1 on a Omni3576 carrier board:
- SD-card boot
- eMMC boot
- LED
- PCIe/NVMe
- USB2.0 HOST
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Radxa ROCK 4D is a compact single-board computer (SBC) featuring
numerous top-tier functions, features, and expansion options.
Equipped with the Rockchip RK3576 or RK3576J SoC, the ROCK 4D boasts an
octa-core CPU (4x Cortex-A72 + 4x Cortex-A53), Mali-G52 GPU, and a
powerful 6 TOPS NPU, making it ideal for AI and multimedia tasks.
Features tested on a Radxa ROCK 4D v1.112:
- SPI Flash boot
- Ethernet
- PCIe/NVMe
- USB host
ROCK 4D boards with SPI Flash is configured to boot from FSPI0->UFS->USB,
or directly from USB when the MASKROM button is pressed, booting
directly from SD-card is not possible on these boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A variety of Qualcomm features/fixes for this cycle, notably with a few
new platforms gaining support:
* Initial support for SDM670 (similar to SDM845), SM6350, and SM7150
platforms is added
* USB and UART issues on MSM8916 are addressed (improving stability/
reliability)
* Firmware loading is implemented for the GENI serial engine, this is
used on some platforms to load firmware for i2c/spi/uart to work
Some additional patches like binman support for building MBN files still
need some additional work.
CI: 8ef6ac07b3/pipelines
Add support for the Toradex SMARC iMX95.
Link: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx95
Link: https://www.toradex.com/products/carrier-board/smarc-development-board-kit
Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
Co-developed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Co-developed-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
CONFIG_BAUDRATE is not relevant for the QUP driver, and neither is
CONFIG_DEBUG_UART_SKIP_INIT so remove them from the doc.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250924-2025-10-misc-v1-4-7e75842ca714@fairphone.com
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
Add initial board docs for Milk-V Mars CM (eMMC) and Milk-V Mars CM Lite
(SD Card) to the visionfive2 board target.
Signed-off-by: E Shattow <e@freeshell.de>
The j722s_evm support is now largely complete and is certainly
not limited to UART boot so drop the confusing note from the docs.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Add more bootloading details for E850-96 board. New sections cover next
topics:
- Hardware configuration of the boot device
- Flashing and updating the software (multiple methods)
- Booting with Standard Boot (multiple methods)
- EFI System Partition structure for E850-96
- Loadable firmware (LDFW) note
- Ethernet and USB Host Support
That documents all recently enabled U-Boot features for E850-96, which
can hopefully make U-Boot more useful for the users and developers of
this platform.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
SoCFPGA updates for v2025.10:
CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27762
This pull request brings a set of updates across SoCFPGA platforms
covering Agilex5, Agilex7, N5X, and Stratix10. The changes include:
* Agilex5 enhancements:
- USB3.1 enablement and DWC3 host driver support
- System Manager register configuration for USB3
- Watchdog timeout increase and SDMMC clock API integration
- dcache handling improvements in SMC mailbox path
- Enable SPL_SYS_DCACHE_OFF in defconfig
* Clock driver improvements:
- Introduce dt-bindings header for Agilex clocks
- Add enable/disable API and EMAC clock selection fixes
- Replace manual shifts with FIELD_GET usage
* DDR updates:
- IOSSM mailbox compatibility check
- Correct DDR calibration status handling
* Device tree changes:
- Agilex5: disable cache allocation for reads
- Stratix10: add NAND IP node
- Enable driver model watchdog
- Enable USB3.1 node for Agilex5
* Config cleanups:
- Simplify Agilex7 VAB defconfig
- Remove obsolete SYS_BOOTM_LEN from N5X VAB config
- Enable CRC32 support for SoCFPGA
- Increase USB hub debounce timeout
Overall this set improves reliability of DDR and cache flows,
adds missing USB and MMC features for Agilex5, and refines clock
and configuration handling across platforms.
This patch set has been tested on Agilex 5 devkit, and Agilex devkit.
Add board-level code and defconfig for the i.MX943 EVK board, supporting
multiple SOM variants: 19x19 LPDDR5, 19x19 LPDDR4 and 15x15 LPDDR4.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
OP-TEE configs are enabled by default, change the doc to no longer
declare OP-TEE as optional. Also remove CFG_TEE_BENCHMARK as it is no
longer present in optee_os.
Further, phycore-imx8mm and imx8mm-phygate-tauri-l use different build
instructions, so dissolve the common file for building OP-TEE.
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Allow to flash a board using NXP UUU utility:
- Enable fastboot support on USB.
- Add fastboot partition aliases with names used by UUU. Also add extra
environment variables used by UUU.
- Set 'dofastboot' environment variable based on boot device
configuration, allowing to automatically enter fastboot when booting
from USB.
Signed-off-by: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>
Add documentation to support the addition of the MPFS Video Kit.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
With the upcoming additions of new MPFS boards, separate common
documentation to allow this to be reused appropriately and avoid
duplication.
Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This patch is used to restore support for i.MX95 A0 silicon. To avoid
duplicating defconfig, imx95.config is added and can be shared between
imx95_a0_19x19_evk_defconfig and imx95_19x19_evk_defconfig.
container.cfg and imximage.cfg are used to created .cfgout files that
are be passed to mkimage with -n to build flash.bin. Now they have been
deleted and replaced by adding their content to properties of node which
type is nxp-imx9image under binman node.
Fixes: 9936724aa9b ("imx95_evk: Add i.MX95 B0 support")
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> # imx95-19x19-evk (rA0)
Add new imx8mp-libra-fpsc board.
Bootph tags as well as USB device tree nodes are in u-boot.dtsi for now
and will be removed when upstreamed.
The Libra i.MX 8M Plus FPSC is a single board computer. It uses an i.MX
8M Plus FPSC [1] System on Module which utilizes the FPSC standard [2].
[1] https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-8m-plus-fpsc
[2] https://www.phytec.eu/en/produkte/system-on-modules/fpsc
Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Tested-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Yannic Moog <y.moog@phytec.de>
ArmSoM-Sige5 adopts the second-generation 8nm high-performance AIOT
platform Rockchip RK3576, with a 6 TOPS computing power NPU and support
for up to 16GB of large memory. It supports 4K video encoding and
decoding, offers rich interfaces including dual gigabit Ethernet ports,
WiFi 6 & BT5, and various video outputs.
Features tested on a ArmSoM Sige5 v1.1:
- SD-card boot
- eMMC boot
- Ethernet
- PCIe NVMe
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a minimal generic RK3576 board that only have eMMC, SDMMC and USB
OTG enabled. This defconfig can be used to boot from eMMC or SD-card on
most RK3576 boards that follow reference board design.
eMMC and SD-card boot tested on:
- ArmSoM CM5
- ArmSoM Sige5
- FriendlyElec NanoPi M5
- Luckfox Omni3576
- Toybrick TB-RK3576D
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The GameForce Ace is an RK3588S based handheld gaming device.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Surface 2 is a Surface-series Windows RT hybrid tablet computer created by
Microsoft. Surface 2 uses a 1.7 GHz quad-core Nvidia Tegra 4 chipset with
2 GB of RAM, features 10.6 inch FullHD ClearType HD screen with 16:9 aspect
ratio and 32/64 GB of internal memory that can be supplemented with a
microSDXC card giving up to 64 GB of additional storage.
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Add documentation for Voyager board.
Signed-off-by: Randolph Sheng-Kai Lin <randolph@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Bryan Brattlof <bb@ti.com> says:
The AM62Ax was created right when TI was shifting to their high security
(HS-FS and HS-SE) processes. During this transition a small subset of
AM62A parts where configured to use the old "GP" security for internal
and for select groups of partners but never sold for the wider public.
To help simplify the build and to avoid any confusion of which security
configurations are supported going forward remove the GP builds for the
AM62A SoCs.
Link: https://lore.kernel.org/r/20250729-no-62a-gp-v1-0-1dbdb4469ad3@ti.com
