Add a null check for 'file' before dereferencing it and also rework the
error handling to be a bit more sane.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
The return value from alloc_super can be an error pointer so the error
check needs to detect this as well as checking the pointer for being
NULL.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Returning directly after buf has been allocated will result in a memory
leak. Instead set the error code and goto the common unwind code to
ensure that buf will be freed before returning.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
The fastmap VID header is embedded in struct ubi_scan_info. During fastmap
scan, the header is copied into struct ubi_scan_info, if valid. The former
code mixed up the amount of copied bytes and copied more bytes than
nessesary. This had no side effect, since the affected struct members are
uninitialized at that point and overwritten later.
Limit the copied bytes to the VID header size.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
Reported-by: Andrew Goodbody <andrew.goodbody@linaro.org>
When checking the VID header of a static volume there is an early test
for data_size == 0 so testing for that condition again is guaranteed to
fail. Just remove this piece of code.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
This adds a new U-Boot command 'c5_pl330_dma' for Cyclone V SoCDK
boards. It provides access to the Reset Manager's Per2ModRst register
to release the reset for ARM PrimeCell PL330 DMA channels. This allows
software to initialize and use the PL330 DMA controller properly after
reset.
Signed-off-by: Brian Sune <briansune@gmail.com>
[trini: Minor style fixes]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add missing help text for the -y and -Y parameters of mkimage.
Fixes: 6dfd14e1228e ("mkimage: Add support for bundling TFA BL31 in mkimage -f auto")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Use plain buffer pointer in request_firmware_into_buf_via_script()
instead of a pointer to pointer. The later is not necessary as the
request_firmware_into_buf_via_script() does not modify the buffer
pointer. Update the mediatek driver to match.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
There are multiple version of the same reference board with different
RAM size and it's not enough to base the RAM size entirely from DT. To
better support it use the get_ram_size way to scan for the actual RAM
size of Airoha SoC and increase the size of the memory map.
Also rework the memory map to account for 2 memory map. The first one of
2GB for 32bit DMA and for safe usage of U-Boot. The second one for the
rest of the RAM since up to 8GB are supported.
Reviewed-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Anshul Dalal <anshuld@ti.com> says:
During the implementation of falcon mode for TI's K3 devices [1], I encountered
several limitations in regards to the current falcon mode support in U-Boot
especially in ensuring a secure boot flow.
Although the current implementation allows for loading of a signed fitImage as
the SPL payload, there are still a few edge cases that might allow bypassing the
verified boot path.
The following issues with current falcon mode need to be resolved:
1) No fallback:
We currently fallback to regular boot flow if falcon mode fails,
this might not be secure.
2) No arguments file:
We currently load a kernel file (which could be a raw image or FIT)
alongside an args file (usually the DT). The args file here doesn't have
any verification mechanism, so should be skipped altogether as the FIT can
contain the DT.
3) No access to env:
In ext and fat fs boot, currently we also reads the environment to get the
names of the kernel and the arg file. This should be disabled in secure
falcon flow as the env might not be secure.
4) No raw image boot:
Boot should fail when the kernel file is a raw kernel image, only FIT should
be allowed.
As per the recommendation of maintainers[2], I have decided to split the above
set of tasks into multiple patch series. This is the first one which fixes the
load order of kernel image and the args file in falcon mode. Along with some
minor cleanup.
[1]: https://lore.kernel.org/u-boot/20250603142452.2707171-1-anshuld@ti.com/
[2]: https://lore.kernel.org/u-boot/20250911172313.GT124814@bill-the-cat/
Link: https://lore.kernel.org/r/20250923124639.667718-1-anshuld@ti.com
Minor cleanup of spl_ext and spl_fat files, removing the outdated
CONFIG_SPL_LIBCOMMON_SUPPORT symbols similar to the commit 1847129025e0
("spl: mmc: Drop checks for CONFIG_SPL_LIBCOMMON_SUPPORT") and adding a
few extra failure reports.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Load the kernel image before args in falcon mode to be consistent with
the load order for other boot media.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Load the kernel image before args in falcon mode to be consistent with
the load order for other boot media.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Currently in falcon mode, the FS and raw mmc boot loads the args file
first followed by the kernel image whereas others load in the opposite
order. This inconsistency means falcon boot doesn't behave the same
across various boot media.
For example, in the case where the kernel file is a FIT with the kernel
image present alongside the dtb and the args file is another DT, which
DT should be picked? The one form the FIT or the one set by the args
file? Currently this depends entirely on how the boot media handles
falcon mode.
Therefore, this patch enforces the load order of the kernel image first
followed by the args file in FAT FS boot. So in the above example, the
args file would take precedence.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Anshul Dalal <anshuld@ti.com>
Enable CONFIG_ENV_IS_NOWHERE and force default environment when SoC
boots from serial loader. In this case the U-Boot environment cannot
be stored to flash with the 'saveenv' command.
This makes serial loader boot completely independent from any
environment stored in flash.
Signed-off-by: Eberhard Stoll <eberhard.stoll@kontron.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
This is useful for development and manufacturing setups as fastboot
can be used without requiring any user input on the device.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
The bootstd framework is the new way to support various bootflows
and media. Use it instead of legacy distro boot.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Enable a bunch of useful features such as:
* Linux devicetree fixups
* devicetree overlay support
* secure boot dependencies
* commands (filesystems, disks, etc.)
* fastboot support
* USB storage/ethernet
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
This allows userspace tools like libubootenv to determine the
location of the currently used environment and select a
matching config.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Depending on the MMC boot device, select the proper location for the
environment.
* SD card and eMMC main partition: use offsets from CONFIG_ENV_OFFSET
and CONFIG_ENV_OFFSET_REDUND.
* eMMC boot partition: use offset -2*ENV_SIZE and -ENV_SIZE from the
end of the partition.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Enable support for using fixed regulators from the devicetree and
auto enable them if requested.
This way U-Boot will enable the CARRIER_PWR_EN signal of the OSM
module automatically while initializing the board.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
The module version this warning is referring to never really existed
except for in-house development and there is a conflict with the
I2C address used for detecting it and the I2C EEPROM of the latest
OSM-S module. Remove the check.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Enable everything that is required to load via USB. The SPL needs
SDP support so it can load the U-Boot proper image via USB after
it has been loaded via serial loader mode of the i.MX.
This way we can use the uuu tool for loading SPL and U-Boot
proper like this:
uuu -brun flash.bin
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
The limit of 0x27000 (156 KiB) was valid at times the DDR firmware
required a fixed amount of 96 KiB of space. Now that we use binman
to include the DDR firmware it only needs around 57 KiB of space and
there is more room for the SPL.
Increase the max SPL size to 196 KiB so there is still 60 KiB for DDR
firmware. This allows us to enable USB and SDP support in SPL.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Add rauc to bootmeths variable if BOOTMETH_RAUC is enabled. This is
setting a proper default for RAUC enabled systems.
Signed-off-by: Martin Schwan <m.schwan@phytec.de>
The patch adds benchmark option to the help of mtd command. For the
'mtd write' case the help line exceed 80 characters. Ignore this issue
as modern terminals are capable to handle more characters.
The patch also formats other command to make sure all device names
starts on the same collumn.
Fixes: d246e70cf81d0 ("cmd: mtd: Enable speed benchmarking")
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The shown speed is inversely proportional to the data size.
See the output:
spi-nand: spi_nand nand@0: Micron SPI NAND was found.
spi-nand: spi_nand nand@0: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 128
...
=> mtd read.benchmark spi-nand0 $loadaddr 0 0x40000
Reading 262144 byte(s) (128 page(s)) at offset 0x00000000
Read speed: 63kiB/s
=> mtd read.benchmark spi-nand0 $loadaddr 0 0x20000
Reading 131072 byte(s) (64 page(s)) at offset 0x00000000
Read speed: 127kiB/s
=> mtd read.benchmark spi-nand0 $loadaddr 0 0x10000
Reading 65536 byte(s) (32 page(s)) at offset 0x00000000
Read speed: 254kiB/s
In the spi-nand case 'io_op.len' is not always the same as 'len', thus
we are using the wrong amount of data to derive the speed.
Also make sure we are using 64-bit calculation to get a more precise
results.
Fixes: d246e70cf81d0 ("cmd: mtd: Enable speed benchmarking")
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
This patch implements read-only test of nand flash devices.
Test reads blocks of NAND flash in normal and raw modes and compares
results. The following statuses can be returned for a block:
* non-ecc reading failed,
* ecc reading failed,
* block is bad,
* bitflips is above maximum,
* actual number of biflips above reported one,
* bitflips reached it maximum value,
* bitflips above threshold,
* block is ok.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Some nand flashes (like spi-nand one) are registered with mtd
subsystem only, thus nand command can't be used to work with
such flashes. As result some functionality is missing.
This patch implements 'nand torture' functionality for mtd command.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Some nand flashes (like spi-nand one) are registered with mtd
subsystem only, thus nand command can't be used to work with
such flashes. As result some functionality is missing.
This patch implements 'nand markbad' functionality for mtd command.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Continuous reading may result in multiple flash pages reading in one
operation. Unfortunately, not all spinand controllers support such
large reading. They will read less data. Unfortunately, the operation
can't be continued.
In this case:
* disable continuous reading on this (not good enough) spi controller
* repeat reading in regular mode.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Continuous reading may result in multiple flash pages reading in one
operation. Typically only one flash page has read/written (a little bit
more than 2-4 Kb), but continuous reading requires the spi controller
to read up to 512 Kb in one operation without toggling CS in beetween.
Roughly speaking spi controllers can be divided on 2 categories:
* spi controllers without dirmap acceleration support
* spi controllers with dirmap acceleration support
Firt of them will have issues with continuous reading if restriction on
the transfer length is implemented in the adjust_op_size() handler.
Second group often supports acceleration of single page only reading.
Thus enabling of continuous reading can break flash reading.
This patch tries to create dirmap for continuous reading first and
fallback to regular reading if spi controller refuses to create it.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Continuous mode is only supported for data reads, thus writing
requires only single flash page mapping.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
This makes the U-Boot SPI NAND driver almost the same as in Linux
6.17-rc1. The only major differences are:
* support of ECC engines. The Linux driver supports different ECC
engines while U-Boot uses on-die ECC only.
* per operation maximum SPI bus frequency
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
There is already a manufacturer hook, which is manufacturer specific but
not chip specific. We no longer have access to the actual NAND identity
at this stage so let's add a per-chip configuration hook to align the
chip configuration (if any) with the core's setting.
This is a port of linux commit
da55809ebb45 ("mtd: spinand: Add a ->configure_chip() hook")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Since commit 3d1f08b032dc ("mtd: spinand: Use the external ECC engine
logic") the spinand_write_page() function ignores the errors returned
by spinand_wait(). Change the code to propagate those up to the stack
as it was done before the offending change.
This is a port of linux commit
091d9e35b85b ("mtd: spinand: propagate spinand_wait() errors from spinand_write_page()")
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Currently the best variant picked in the first one in the list provided
in the manufacturer driver. This worked well while all operations where
performed at the same speed, but with the introduction of DTR transfers
this no longer works correctly.
Let's continue iterating over all the alternatives, even if we find a
match, keeping a reference over the theoretically fastest
operation. Only at the end we can tell which variant is the best.
This logic happening only once at boot.
The patch is based on linux commit
666c299be696 (mtd: spinand: Enhance the logic when picking a variant)
created by Miquel Raynal <miquel.raynal@bootlin.com>
The code was a bit restricted in the functionality since not all
required functionality is supported in the u-boot.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The code was ported from linux-6.15
based on a linux commit c06b1f753bea (mtd: spinand: add OTP support)
created by Martin Kurbanov <mmkurbanov@salutedevices.com>
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
When the host ECC fails to correct the data error of NAND device,
there's a special read for data recovery method which can be setup
by the host for the next read. There are several retry levels that
can be attempted until the lost data is recovered or definitely
assumed lost.
This is the port of linux commit
f2cb43c98010 (mtd: spinand: Add read retry support)
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The code was ported from linux-6.12. The original continuous reading
support was implemented by Miquel Raynal <miquel.raynal@bootlin.com>
in linux commit 631cfdd0520d (mtd: spi-nand: Add continuous read support).
Here is an original patch description:
--------------------------------------
A regular page read consist in:
- Asking one page of content from the NAND array to be loaded in the
chip's SRAM,
- Waiting for the operation to be done,
- Retrieving the data (I/O phase) from the chip's SRAM.
When reading several sequential pages, the above operation is repeated
over and over. There is however a way to optimize these accesses, by
enabling continuous reads. The feature requires the NAND chip to have a
second internal SRAM area plus a bit of additional internal logic to
trigger another internal transfer between the NAND array and the second
SRAM area while the I/O phase is ongoing. Once the first I/O phase is
done, the host can continue reading more data, continuously, as the chip
will automatically switch to the second SRAM content (which has already
been loaded) and in turns trigger the next load into the first SRAM area
again.
From an instruction perspective, the command op-codes are different, but
the same cycles are required. The only difference is that after a
continuous read (which is stopped by a CS deassert), the host must
observe a delay of tRST. However, because there is no guarantee in Linux
regarding the actual state of the CS pin after a transfer (in order to
speed-up the next transfer if targeting the same device), it was
necessary to manually end the continuous read with a configuration
register write operation.
Continuous reads have two main drawbacks:
* They only work on full pages (column address ignored)
* Only the main data area is pulled, out-of-band bytes are not
accessible. Said otherwise, the feature can only be useful with on-die
ECC engines.
Performance wise, measures have been performed on a Zynq platform using
Macronix SPI-NAND controller with a Macronix chip (based on the
flash_speed tool modified for testing sequential reads):
- 1-1-1 mode: performances improved from +3% (2-pages) up to +10% after
a dozen pages.
- 1-1-4 mode: performances improved from +15% (2-pages) up to +40% after
a dozen pages.
This series is based on a previous work from Macronix engineer Jaime
Liao.
--------------------------------------
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
SkyHigh spinand device has ECC enable bit in configuration register but
it must be always enabled. If ECC is disabled, read and write ops
results in undetermined state. For such devices, a way to avoid raw
access is needed.
Introduce SPINAND_NO_RAW_ACCESS flag to advertise the device does not
support raw access. In such devices, the on-die ECC engine ops returns
error to I/O request in raw mode.
Checking and marking BBM need to be cared as special case, by adding
fallback mechanism that tries read/write OOB with ECC enabled.
This is a port of linux commit
6d9d6ab3a82a (mtd: spinand: Introduce a way to avoid raw access)
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
We don't have to call spinand_write_enable_op() in spinand_markbad() as
it is called in spinand_write_page().
This is the port of linux commit
c6858779f1f5 (mtd: spinand: Remove write_enable_op() in markbad())
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Add two flags for inserting the Plane Select bit into the column
address during the write_to_cache and the read_from_cache operation.
Add the SPINAND_HAS_PROG_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the write_to_cache operation.
Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the read_from_cache operation.
This is a port of linux commit
ca229bdbef29 (mtd: spinand: Add support for setting plane select bits)
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240909092643.2434479-2-linchengming884@gmail.com
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
