6 Commits

Author SHA1 Message Date
Heinrich Schuchardt
7d5c2834c7 riscv: don't imply non-existent CONFIG_IP_DYN
The symbol CONFIG_IP_DYN does not exist, but multiple contributors
copied an imply statement.

Remove the imply IP_DYN statements.

Fixes: 3fda0262c33f ("riscv: Add SiFive FU540 board support")
Fixes: 64413e1b7caf ("riscv: Add Microchip MPFS Icicle Kit support")
Fixes: 70415e1e528d ("board: sifive: add HiFive Unmatched board support")
Fixes: 6f902b85b6ee ("board: starfive: Add Kconfig for StarFive VisionFive v2 Board")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
2026-03-13 02:57:33 +08:00
Conor Dooley
2f7420ccaa riscv: mpfs: move SoC level options to the CPU Kconfig
There are multiple boards that use the PolarFire SoC, so extract
the Kconfig sections that are determined at a CPU level from the board
Kconfigs now that we have a CPU Kconfig.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-12-08 12:10:43 +08:00
Conor Dooley
4d056a2037 riscv: create a custom CPU implementation for PolarFire SoC
PolarFire SoC needs a custom implementation of top_of_ram(), so stop
using the generic CPU & create a custom CPU instead.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-12-08 12:10:39 +08:00
Tom Rini
0eaa4b3373 Merge branch 'next'
Merge the outstanding changes from the 'next' branch to master.
2025-10-06 13:20:24 -06:00
Jamie Gibbons
41e5a6520b board: microchip: mpfs_generic: include processing of dtbos
Include the use of the process dtbo functionality added in the MPFS
system controller driver.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:22:42 +08:00
Jamie Gibbons
d141a41feb board: microchip: icicle: rename all icicle files to generic
Make all Icicle Kit files generic. This supports the addition of
upcoming support for other MPFS boards.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:22:42 +08:00