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arm64: imx8mp: Fold inline ECC into spl.c on DH i.MX8MP DHCOM SoM

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The inline ECC configuration is identical for 2 GiB DRAM variants
and 4 GiB DRAM variants of the SoM, no matter the rank count. Fold
the ECC configuration directly into spl.c to simplify the upcoming
deduplication. No functional change.

Signed-off-by: Marek Vasut <marex@nabladev.com>
This commit is contained in:
Marek Vasut 2026-04-01 23:02:17 +02:00 committed by Fabio Estevam
parent b94d20f66e
commit 245d4a60de
4 changed files with 26 additions and 32 deletions
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4
board/dhelectronics/dh_imx8mp/lpddr4_timing.h
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@ -9,10 +9,6 @@
extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32;
extern struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32;
typedef void (*scrub_func_t)(void);
extern void dh_imx8mp_dhcom_dram_scrub_16g_x32(void);
extern void dh_imx8mp_dhcom_dram_scrub_32g_x32(void);
u8 dh_get_memcfg(void);
#define DDRC_ECCCFG0_ECC_MODE_MASK 0x7

14
board/dhelectronics/dh_imx8mp/lpddr4_timing_2G_32.c
View File

@ -1853,17 +1853,3 @@ struct dram_timing_info dh_imx8mp_dhcom_dram_timing_16g_x32 = {
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
.fsp_table = { 3600, 400, 100, },
};
#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
void dh_imx8mp_dhcom_dram_scrub_16g_x32(void)
{
ddrc_inline_ecc_scrub(0x0,0x3ffffff);
ddrc_inline_ecc_scrub(0x4000000,0x7ffffff);
ddrc_inline_ecc_scrub(0x8000000,0xbffffff);
ddrc_inline_ecc_scrub(0xc000000,0xfffffff);
ddrc_inline_ecc_scrub(0x10000000,0x13ffffff);
ddrc_inline_ecc_scrub(0x14000000,0x17ffffff);
ddrc_inline_ecc_scrub(0x18000000,0x1bffffff);
ddrc_inline_ecc_scrub_end(0x0,0x1fffffff);
}
#endif

14
board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c
View File

@ -1857,17 +1857,3 @@ struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32 = {
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
.fsp_table = { 3600, 400, 100, },
};
#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
void dh_imx8mp_dhcom_dram_scrub_32g_x32(void)
{
ddrc_inline_ecc_scrub(0x0,0x7ffffff);
ddrc_inline_ecc_scrub(0x8000000,0xfffffff);
ddrc_inline_ecc_scrub(0x10000000,0x17ffffff);
ddrc_inline_ecc_scrub(0x18000000,0x1fffffff);
ddrc_inline_ecc_scrub(0x20000000,0x27ffffff);
ddrc_inline_ecc_scrub(0x28000000,0x2fffffff);
ddrc_inline_ecc_scrub(0x30000000,0x37ffffff);
ddrc_inline_ecc_scrub_end(0x0,0x3fffffff);
}
#endif

26
board/dhelectronics/dh_imx8mp/spl.c
View File

@ -139,6 +139,32 @@ static void spl_dram_init(void)
}
#if IS_ENABLED(CONFIG_IMX8M_DRAM_INLINE_ECC)
static void dh_imx8mp_dhcom_dram_scrub_16g_x32(void)
{
ddrc_inline_ecc_scrub(0x0,0x3ffffff);
ddrc_inline_ecc_scrub(0x4000000,0x7ffffff);
ddrc_inline_ecc_scrub(0x8000000,0xbffffff);
ddrc_inline_ecc_scrub(0xc000000,0xfffffff);
ddrc_inline_ecc_scrub(0x10000000,0x13ffffff);
ddrc_inline_ecc_scrub(0x14000000,0x17ffffff);
ddrc_inline_ecc_scrub(0x18000000,0x1bffffff);
ddrc_inline_ecc_scrub_end(0x0,0x1fffffff);
}
static void dh_imx8mp_dhcom_dram_scrub_32g_x32(void)
{
ddrc_inline_ecc_scrub(0x0,0x7ffffff);
ddrc_inline_ecc_scrub(0x8000000,0xfffffff);
ddrc_inline_ecc_scrub(0x10000000,0x17ffffff);
ddrc_inline_ecc_scrub(0x18000000,0x1fffffff);
ddrc_inline_ecc_scrub(0x20000000,0x27ffffff);
ddrc_inline_ecc_scrub(0x28000000,0x2fffffff);
ddrc_inline_ecc_scrub(0x30000000,0x37ffffff);
ddrc_inline_ecc_scrub_end(0x0,0x3fffffff);
}
typedef void (*scrub_func_t)(void);
static const scrub_func_t dram_scrub_fn[8] = {
NULL, /* 512 MiB */
NULL, /* 1024 MiB */