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ca93b018dc
Some definitions can be shared among mt8192, mt8195, and mt8186, so move them to pmic_wrap_init_common.h. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I992b61a47a84039fe8c246e2ff75721c57ee41a5
62 lines
1.3 KiB
C
62 lines
1.3 KiB
C
/*
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* Copyright (c) 2021-2022, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PMIC_WRAP_INIT_H
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#define PMIC_WRAP_INIT_H
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#include <stdint.h>
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#include "platform_def.h"
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#include <pmic_wrap_init_common.h>
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static struct mt8186_pmic_wrap_regs *const mtk_pwrap = (void *)PMIC_WRAP_BASE;
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/* timeout setting */
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enum {
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TIMEOUT_RESET = 50, /* us */
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TIMEOUT_READ = 50, /* us */
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TIMEOUT_WAIT_IDLE = 50 /* us */
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};
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/* PMIC_WRAP registers */
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struct mt8186_pmic_wrap_regs {
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uint32_t unused[776];
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uint32_t wacs2_cmd;
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uint32_t wacs2_rdata;
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uint32_t wacs2_vldclr;
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};
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enum {
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RDATA_WACS_RDATA_SHIFT = 0,
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RDATA_WACS_FSM_SHIFT = 16,
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RDATA_WACS_REQ_SHIFT = 19,
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RDATA_SYNC_IDLE_SHIFT = 20,
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RDATA_INIT_DONE_SHIFT = 22,
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RDATA_SYS_IDLE_SHIFT = 23,
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};
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enum {
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RDATA_WACS_RDATA_MASK = 0xffff,
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RDATA_WACS_FSM_MASK = 0x7,
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RDATA_WACS_REQ_MASK = 0x1,
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RDATA_SYNC_IDLE_MASK = 0x1,
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RDATA_INIT_DONE_MASK = 0x1,
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RDATA_SYS_IDLE_MASK = 0x1,
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};
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/* WACS_FSM */
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enum {
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WACS_FSM_IDLE = 0x00,
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WACS_FSM_REQ = 0x02,
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WACS_FSM_WFDLE = 0x04,
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WACS_FSM_WFVLDCLR = 0x06,
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WACS_INIT_DONE = 0x01,
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WACS_SYNC_IDLE = 0x01,
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WACS_SYNC_BUSY = 0x00
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};
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#endif /* PMIC_WRAP_INIT_H */
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