12179 Commits

Author SHA1 Message Date
Lauren Wehrmeister
d3d2a5a484 Merge "fix(cpus): workaround for Cortex-X3 erratum 2615812" into integration 2022-11-28 18:15:06 +01:00
Sandrine Bailleux
bf09c416ab Merge "fix(intel): fix print out ERROR when encounter SEU_Err" into integration 2022-11-28 15:08:25 +01:00
Sandrine Bailleux
086d981657 Merge changes I8667f362,Ia0bd832c into integration
* changes:
  feat(intel): setup FPGA interface for Agilex
  fix(intel): fix pinmux handoff bug on Agilex
2022-11-28 15:07:11 +01:00
Sandrine Bailleux
c00b06a41b Merge "fix(intel): fix sp_timer0 is not disabled in firewall on Agilex" into integration 2022-11-28 15:03:16 +01:00
Sandrine Bailleux
f6620acd05 Merge "fix(intel): remove checking on TEMP and VOLT checking for HWMON" into integration 2022-11-28 15:02:41 +01:00
Leo Yan
cffc956edf feat(qemu): support pointer authentication
This patch includes source code to support pointer authentication on
QEMU platform.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Change-Id: I582923080fe1d5baffd7d0ccfe83e3b28f910ae1
2022-11-28 14:19:05 +01:00
Sandrine Bailleux
27c07d0a00 Merge "fix(rss): remove null-terminator from RSS metadata" into integration 2022-11-28 12:46:56 +01:00
David Vincze
85a14bc0a9 fix(rss): remove null-terminator from RSS metadata
Remove the null-terminator of the string-like data items
from the RSS measurement's metadata. The 'version' and
'sw_type' items have an associated length value which
should not include a null-terminator when storing the
measurement.

Change-Id: Ia91ace2fff8b6f75686dd2e1862475268300bbdb
Signed-off-by: David Vincze <david.vincze@arm.com>
2022-11-25 18:31:14 +01:00
Joanna Farley
4ccbdd86bc Merge "fix(zynqmp): check return status of pm_get_api_version" into integration 2022-11-25 16:25:53 +01:00
Joanna Farley
896c0daf3e Merge "fix(versal): initialize the variable with value 0 in pm code" into integration 2022-11-25 16:24:53 +01:00
Mate Toth-Pal
3be9c27694 build: enable adding MbedTLS files for platform
The platform.mk can add extra MbedTLS source files to LIBMBEDTLS_SRC.

Change-Id: Ida9abfd59d8b02eae23ec0a7f326db060b42bf49
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
2022-11-25 10:06:10 +01:00
Mate Toth-Pal
6d0525aafe feat(lib/psa): add read_measurement API
This API is added for testing purposes. It makes possible to write test
cases that read measurements back after extending them, and compare
them to expected results.

Change-Id: Iec447d972fdd54a56ab933a065476e0f4d35a6fc
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
2022-11-25 10:00:13 +01:00
Naman Patel
c92ad369ca fix(zynqmp): check return status of pm_get_api_version
MISRA Violation: MISRA C-2012 Rule 17.7
- Check the return status of function pm_get_api_version
and return error in case of failure.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I69fb000c04f22996da7965a09a1797c7bfaad252
2022-11-24 05:30:23 -08:00
Naman Patel
cd73d62b0e fix(versal): initialize the variable with value 0 in pm code
Remove zeromem function as the array is already initialized
with value 0.

MISRA Violation: MISRA C-2012 Rule 9.1
- Initialize the array/variable with a value 0 to resolve
the misra warnings in pm_service component.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I1a3d44a7ae4088a3034eb0119d82b99cd4617ccd
2022-11-24 05:25:48 -08:00
Manish Pandey
53f63eb0ff Merge "feat(qemu): increase size of bl2" into integration 2022-11-24 11:41:08 +01:00
Jens Wiklander
4daeaf341a fix(sptool): add dependency to SP image
In the generated sp_gen.mk, add a dependency to the image described in
the sp_layout.json file to make sure that the pkg file is re-generated
if the SP image is updated.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: Id936f907d6baa6b0627c4bb9608323e5157c7a9b
2022-11-23 10:58:33 +01:00
Jiafei Pan
2d541cbcbe fix(nxp-ddr): fix coverity issue
Fixed coverity issue for "shifting by a negtive value", returned
before go to the next shifting code.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I00171b057b8948cb9e9ec5d9405b2e32aba568fb
2022-11-23 09:17:48 +08:00
Pankaj Gupta
87612eaeff fix(nxp-ddr): fix underrun coverity issue
Coverity Issue detail:

underrun-local: Underrunning array bin[i].cl[k].caslat
                at element index -1 (byte offset -1)
                using index j (which evaluates to -1).

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1ec4833bbd5db1ac51436eac606484eefc4338ee
2022-11-23 09:17:48 +08:00
Pankaj Gupta
236ca5667e fix(nxp-drivers): fix sd secure boot failure
secure-boot: fix for sd boot mode failure:
- Array for ROT Pub key hash is not cache aligned.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I7d1c1115066dd5323399f14b5c3667a1355d5671
2022-11-23 09:17:48 +08:00
Jiafei Pan
c07f5e9e50 feat(lx2): support more variants
Add more lx2 variants support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iac19b2532531616f638fd8f42bb6953bd1e83eda
2022-11-23 09:17:48 +08:00
Jiafei Pan
50aa0ea7ac fix(lx2): init global data before using it
Need to initialize global data firstly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I18c3ccc2d0c8175bf479889aa03bc1f737df678b
2022-11-23 09:17:48 +08:00
Kshitiz Varshney
c0c157a680 fix(ls1046a): 4 keys secureboot failure resolved
Changed the size of OCRAM reserved by ROM code and increased the
size of CSF header.
Earlier, 4 keys image was exceeding boundaries and landing in
OCRAM location reserved for ROM usage.

Signed-off by:- Kshitiz Varshney <kshitiz.varshney@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I628ff7464fe0184d0553a7962d592aafd42e8137
2022-11-23 09:17:48 +08:00
Pankaj Gupta
334badb50f fix(nxp-crypto): fix secure boot assert inclusion
plat-ls: fix for assert inclusion done for secure boot.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iac8314e5b1c2f0a22fa2ff3ffbccc53ed778ddd9
2022-11-23 09:17:48 +08:00
Pankaj Gupta
e49229911f fix(nxp-crypto): fix coverity issue
In function "desc_length", LSB byte of the first word of the
descriptor will be anded with 0x7F, to get the number of words
constructing the descriptor.

LSB byte of the first word of the descriptor is auto-incremented
with each add_word used while constructing the descriptor.

But if function "desc_add_word" is called more than
MAX_DESC_SIZE_WORDS times, then only the function "desc_length",
can return number of words greater than MAX_DESC_SIZE_WORDS.

This is the condition when core can overwrite the out of bound
memory.

Hence, the following fix is needed:
- Before adding any new word to the descriptor, a check for
  max word length needs to be added, into these functions:
  "desc_add_word" & "desc_add_ptr".

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If896cd2e02ecde72fb09c5147119dec4f2f84bc3
2022-11-23 09:17:48 +08:00
Jiafei Pan
5199b3b93c fix(nxp-drivers): fix fspi coverity issue
Fixed the following coverity issues:
Using uninitialized value cmd_id1, cmd_id2.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I8cd430ec015fc617521db455a6ffe16b33f42b78
2022-11-23 09:17:48 +08:00
Joanna Farley
0125e86b3b Merge "fix(docs): deprecate plat_convert_pk() in v2.9" into integration 2022-11-22 17:07:05 +01:00
Jit Loon Lim
4b3d323acd fix(intel): agilex bitstream pre-authenticate
HSD #15012010816: To add in bitstream pre-authentication checking.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Ia8f1471a674ba16972927084f5fdc27c4ba93103
2022-11-22 23:57:43 +08:00
Jit Loon Lim
7f9e9e4b40 fix(intel): mailbox store QSPI ref clk in scratch reg
When HPS requests QSPI controller access the SDM returns the QSPI
reference clock frequency. Store the provided reference clock frequency
(in kHz) in BOOT_SCRATCH_COLD_0 register (bits [27:0]) as u-boot
QSPI driver expects this.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6b95c19db602387a79ff10abdebbc57abb0c07ff
2022-11-22 23:56:42 +08:00
Jit Loon Lim
68ac5fe14c fix(intel): remove checking on TEMP and VOLT checking for HWMON
Remove high level logic hardware channel checking on HWMON
TEMP and VOLT read.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I9102b7b4334cb95f0b622c498a6569328f534d42
2022-11-22 23:56:06 +08:00
Jit Loon Lim
8de7167eb6 fix(intel): fix sp_timer0 is not disabled in firewall on Agilex
sp_timer0 is not disabled in firewall on Agilex causing Zephyr is facing
issue to access the timer.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I0099e200d6c9ca435f46393c6ed9cbe387870af0
2022-11-22 23:55:02 +08:00
Jit Loon Lim
3905f57134 feat(intel): setup FPGA interface for Agilex
Enable/Disable FPGA interfaces based on handoff configuration.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I8667f362aa53e7c68723e0dbd5284844ae39dfb5
2022-11-22 23:35:36 +08:00
Jit Loon Lim
e6c0389091 fix(intel): fix pinmux handoff bug on Agilex
Incorrect number of FPGA pinmux registers was copied from handoff data.
This caused pinmux_emac0_usefpga register to always be zero meaning
"EMAC0 uses HPS IO Pins" even if handoff data for this register was one
meaning "EMAC0 uses the FPGA Inteface".

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Ia0bd832c61d25f66ef13f39fe28b054cb96af9a1
2022-11-22 23:35:22 +08:00
Sieu Mun Tang
1a0bf6e1d8 fix(intel): fix print out ERROR when encounter SEU_Err
Print out ERROR message when system face encounter SEU_ERR

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I744afbca23b74b164e47472039b5d6fbe5c3c764
2022-11-22 23:22:45 +08:00
Yann Gautier
e0f58c7fb6 fix(docs): deprecate plat_convert_pk() in v2.9
The deprecation was tagged "Next release after 2.8". Now there is a 2.9
planned, directly use this version.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0727eebc4a3800dafafc4166b0c2c40a12c90b4b
2022-11-22 15:15:46 +01:00
Manish V Badarkhe
abef3fe55c refactor(qemu): pass platform metadata as a function's argument
Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.

Change-Id: I9d8316914c046f47cdc6875b16649479e82087aa
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-11-22 13:20:44 +00:00
Manish V Badarkhe
de10522af7 refactor(imx8m): pass platform metadata as a function's argument
Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.

Change-Id: I4b98b6a035abb28c000344f2dbeb3996c69eee61
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-11-22 10:06:56 +00:00
Manish V Badarkhe
7f3d9eae9f refactor(fvp): pass platform metadata as a function's argument
Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.

Change-Id: Id1bf59c243c483d7e32152f094c693e95d29fe2b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-11-22 10:06:56 +00:00
Manish V Badarkhe
5f32444443 refactor(measured-boot): accept metadata as a function's argument
Updated the event log driver's function to accept metadata as an
argument, to remove the platform function usage from the event log
driver to make it a standalone driver.

Change-Id: I512cf693d51dc3c0b9d2c1bfde4f89414e273049
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-11-22 10:06:56 +00:00
Jiafei Pan
07d8e34fdd fix(nxp-drivers): fix tzc380 memory regions config
Setting 2MB shared memory and following 64MB secure memory.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia992d21f205d305a6fff92fc11435634ce7c9d21
2022-11-22 16:35:20 +08:00
Jiafei Pan
5d599b71ea fix(layerscape): fix nv_storage assert checking
Fix incorrect assert checking.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia963bfc053b578f0778ccf06d1dbc2ced4efc266
2022-11-22 16:35:19 +08:00
Maninder Singh
00bb8c37e0 fix(nxp-ddr): apply Max CDD values for warm boot
Timing CFG 0 and Timing CFG 4 are ddr controller registers that
have been affected by 1d phy training during cold boot. They are
needed to be stored and restored along with phy training values.

Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I29c55256e74456515aaeb098e2e0e3475697a466
2022-11-22 16:35:19 +08:00
Maninder Singh
fa0105693c fix(nxp-ddr): use CDDWW for write to read delay
we need to apply the value of CDD write to write for the write to
read CDD delay calculations. Since the current implementation always
provide a negative value of CDDwr so a value of zero was selected.

Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6829997d2ea6ba6cddaaab8332b82b8c66752d7e
2022-11-22 14:58:45 +08:00
Jiafei Pan
c45791b2f2 fix(layerscape): fix errata a008850
Remove errata a008850 from ls1028a and ls1088a, it should
only be feasible for ls1020a, ls1043a and ls1046a.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I8ab84158a2ed6bb15b16d10f8796c3e86fc560a5
2022-11-22 14:56:19 +08:00
Manish Pandey
9881bb93a3 Merge "docs(spm): update threat model" into integration v2.8 v2.8.0 2022-11-21 19:12:00 +01:00
Manish Pandey
9aef90cc7d Merge "docs(qemu): document steps to run in OpenCI" into integration 2022-11-21 18:55:23 +01:00
Madhukar Pappireddy
31b5b36c52 docs(spm): update threat model
Update SPM threat model for possible threats, from malicious
endpoints, related to interrupt management. The mitigations
are based on the guidance provided in FF-A v1.1 EAC0 spec.

Change-Id: Ib9e26e3f1c60fe3a2734a67de1dcf1cea4883d38
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2022-11-21 10:53:48 -06:00
Harrison Mutai
a5667be075 docs(qemu): document steps to run in OpenCI
Add details on how to run QEMU in OpenCI, and what tests are currently
supported.

Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Change-Id: I291e4eb64a58c766519ff7dcac4841ae75c3934e
2022-11-21 16:45:24 +00:00
Sandrine Bailleux
ca3f25dcc4 Merge "fix(intel): fix UART baud rate and clock" into integration 2022-11-21 14:57:10 +01:00
Sieu Mun Tang
8e53b2fa2e fix(intel): fix UART baud rate and clock
Revise the UART baud rate and clock for general platform build,
SIMIC build and EMU build.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I62fefe7b96d5124e75d2810b4fbc1640422b1353
2022-11-21 13:50:10 +01:00
Manish Pandey
8613c15754 Merge "docs(changelog): changelog for v2.8 release" into integration 2022-11-18 18:28:52 +01:00