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fix(cpus): workaround for Cortex-X2 erratum 1916945
Cortex-X2 erratum 1916945 is a Cat B erratum that applies to revisions r0p0 and r1p0 and is fixed in r2p0. The workaround is to set CPUECTLR_EL1[8]. This has a small performance impact (<0.5%). SDEN documentation: https://developer.arm.com/documentation/SDEN-1775100/latest Change-Id: If810b1d0a07c43b3e1aa70d2ec88c1dcfa6f735f Signed-off-by: John Powell <john.powell@arm.com>
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@ -744,6 +744,10 @@ For Cortex-X2, the following errata build flags are defined :
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- ``ERRATA_X2_1901946``: This applies errata 1901946 workaround to Cortex-X2
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CPU. This needs to be enabled only for r1p0, it is fixed in r2p0.
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- ``ERRATA_X2_1916945``: This applies errata 1916945 workaround to Cortex-X2
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CPU. This needs to be enabled for revisions r0p0 and r1p0, it is fixed in
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r2p0.
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- ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2
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CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU,
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it is still open.
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@ -37,6 +37,12 @@ workaround_reset_end cortex_x2, ERRATUM(1901946)
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check_erratum_range cortex_x2, ERRATUM(1901946), CPU_REV(1, 0), CPU_REV(1, 0)
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workaround_reset_start cortex_x2, ERRATUM(1916945), ERRATA_X2_1916945
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sysreg_bit_set CORTEX_X2_CPUECTLR_EL1, BIT(8)
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workaround_reset_end cortex_x2, ERRATUM(1916945)
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check_erratum_ls cortex_x2, ERRATUM(1916945), CPU_REV(1, 0)
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workaround_reset_start cortex_x2, ERRATUM(2002765), ERRATA_X2_2002765
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ldr x0, =0x6
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msr S3_6_C15_C8_0, x0 /* CPUPSELR_EL3 */
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@ -746,6 +746,10 @@ CPU_FLAG_LIST += ERRATA_N3_3699563
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# only to revision r1p0 of the Cortex-X2 cpu, it is fixed in r2p0.
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CPU_FLAG_LIST += ERRATA_X2_1901946
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# Flag to apply erratum 1916945 workaround during reset. This erratum applies
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# to revisions r0p0 and r1p0 of the Cortex-X2 cpu, it is fixed in r2p0.
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CPU_FLAG_LIST += ERRATA_X2_1916945
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# Flag to apply erratum 2002765 workaround during reset. This erratum applies
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# to revisions r0p0, r1p0, and r2p0 of the Cortex-X2 cpu and is still open.
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CPU_FLAG_LIST += ERRATA_X2_2002765
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