diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 997820278..9c55077c2 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -744,6 +744,10 @@ For Cortex-X2, the following errata build flags are defined : - ``ERRATA_X2_1901946``: This applies errata 1901946 workaround to Cortex-X2 CPU. This needs to be enabled only for r1p0, it is fixed in r2p0. +- ``ERRATA_X2_1916945``: This applies errata 1916945 workaround to Cortex-X2 + CPU. This needs to be enabled for revisions r0p0 and r1p0, it is fixed in + r2p0. + - ``ERRATA_X2_2002765``: This applies errata 2002765 workaround to Cortex-X2 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU, it is still open. diff --git a/lib/cpus/aarch64/cortex_x2.S b/lib/cpus/aarch64/cortex_x2.S index 30a1bde58..28bff3688 100644 --- a/lib/cpus/aarch64/cortex_x2.S +++ b/lib/cpus/aarch64/cortex_x2.S @@ -37,6 +37,12 @@ workaround_reset_end cortex_x2, ERRATUM(1901946) check_erratum_range cortex_x2, ERRATUM(1901946), CPU_REV(1, 0), CPU_REV(1, 0) +workaround_reset_start cortex_x2, ERRATUM(1916945), ERRATA_X2_1916945 + sysreg_bit_set CORTEX_X2_CPUECTLR_EL1, BIT(8) +workaround_reset_end cortex_x2, ERRATUM(1916945) + +check_erratum_ls cortex_x2, ERRATUM(1916945), CPU_REV(1, 0) + workaround_reset_start cortex_x2, ERRATUM(2002765), ERRATA_X2_2002765 ldr x0, =0x6 msr S3_6_C15_C8_0, x0 /* CPUPSELR_EL3 */ diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index fa49b73b8..8916b16a3 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -746,6 +746,10 @@ CPU_FLAG_LIST += ERRATA_N3_3699563 # only to revision r1p0 of the Cortex-X2 cpu, it is fixed in r2p0. CPU_FLAG_LIST += ERRATA_X2_1901946 +# Flag to apply erratum 1916945 workaround during reset. This erratum applies +# to revisions r0p0 and r1p0 of the Cortex-X2 cpu, it is fixed in r2p0. +CPU_FLAG_LIST += ERRATA_X2_1916945 + # Flag to apply erratum 2002765 workaround during reset. This erratum applies # to revisions r0p0, r1p0, and r2p0 of the Cortex-X2 cpu and is still open. CPU_FLAG_LIST += ERRATA_X2_2002765