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807abb18f1
Add missing system manager bits from Altera U-Boot to make the code comparable. These are the bits which depend on the FPGA manager. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
69 lines
2.0 KiB
C
69 lines
2.0 KiB
C
/*
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* Copyright (C) 2013 Altera Corporation <www.altera.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/system_manager.h>
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#include <asm/arch/fpga_manager.h>
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DECLARE_GLOBAL_DATA_PTR;
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static struct socfpga_system_manager *sysmgr_regs =
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(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
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/*
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* Populate the value for SYSMGR.FPGAINTF.MODULE based on pinmux setting.
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* The value is not wrote to SYSMGR.FPGAINTF.MODULE but
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* CONFIG_SYSMGR_ISWGRP_HANDOFF.
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*/
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static void populate_sysmgr_fpgaintf_module(void)
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{
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uint32_t handoff_val = 0;
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/* ISWGRP_HANDOFF_FPGAINTF */
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writel(0, &sysmgr_regs->iswgrp_handoff[2]);
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/* Enable the signal for those HPS peripherals that use FPGA. */
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if (readl(&sysmgr_regs->nandusefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_NAND;
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if (readl(&sysmgr_regs->rgmii1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_EMAC1;
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if (readl(&sysmgr_regs->sdmmcusefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_SDMMC;
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if (readl(&sysmgr_regs->rgmii0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_EMAC0;
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if (readl(&sysmgr_regs->spim0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_SPIM0;
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if (readl(&sysmgr_regs->spim1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_SPIM1;
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/* populate (not writing) the value for SYSMGR.FPGAINTF.MODULE
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based on pinmux setting */
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setbits_le32(&sysmgr_regs->iswgrp_handoff[2], handoff_val);
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handoff_val = readl(&sysmgr_regs->iswgrp_handoff[2]);
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if (fpgamgr_test_fpga_ready()) {
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/* Enable the required signals only */
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writel(handoff_val, &sysmgr_regs->fpgaintfgrp_module);
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}
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}
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/*
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* Configure all the pin muxes
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*/
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void sysmgr_pinmux_init(void)
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{
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uint32_t regs = (uint32_t)&sysmgr_regs->emacio[0];
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int i;
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for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table); i++) {
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writel(sys_mgr_init_table[i], regs);
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regs += sizeof(regs);
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}
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populate_sysmgr_fpgaintf_module();
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}
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