mirror of
				https://source.denx.de/u-boot/u-boot.git
				synced 2025-11-04 02:11:25 +01:00 
			
		
		
		
	Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
		
			
				
	
	
		
			36 lines
		
	
	
		
			748 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			36 lines
		
	
	
		
			748 B
		
	
	
	
		
			C
		
	
	
	
	
	
/*
 | 
						|
 *
 | 
						|
 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
 | 
						|
 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
 | 
						|
 *
 | 
						|
 * SPDX-License-Identifier:	GPL-2.0+
 | 
						|
 */
 | 
						|
 | 
						|
/* CPU specific interrupt routine */
 | 
						|
#include <common.h>
 | 
						|
#include <asm/immap.h>
 | 
						|
#include <asm/io.h>
 | 
						|
 | 
						|
int interrupt_init(void)
 | 
						|
{
 | 
						|
	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
 | 
						|
 | 
						|
	/* Make sure all interrupts are disabled */
 | 
						|
	setbits_be32(&intp->imrh0, 0xffffffff);
 | 
						|
	setbits_be32(&intp->imrl0, 0xffffffff);
 | 
						|
 | 
						|
	enable_interrupts();
 | 
						|
 | 
						|
	return 0;
 | 
						|
}
 | 
						|
 | 
						|
#if defined(CONFIG_SLTTMR)
 | 
						|
void dtimer_intr_setup(void)
 | 
						|
{
 | 
						|
	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
 | 
						|
 | 
						|
	out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
 | 
						|
	clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK);
 | 
						|
}
 | 
						|
#endif
 |