u-boot

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History

Stefan Agner f716bf11f3 imx: imx7d: fix ahb clock mux 1

The clock parent of the AHB root clock when using mux option 1
is the SYS PLL 270MHz clock. This is specified in  Table 5-11
Clock Root Table of the i.MX 7Dual Applications Processor
Reference Manual.

While it could be a documentation error, the 270MHz parent is
also mentioned in the boot ROM configuration in Table 6-28: The
clock is by default at 135MHz due to a POST_PODF value of 1
(=> divider of 2).

Signed-off-by: Stefan Agner <stefan@agner.ch>

2016-05-17 17:52:20 +02:00

arc

arc/cache: really do flush_dcache_all() even if IOC exists

2016-04-21 20:09:59 +03:00

arm

imx: imx7d: fix ahb clock mux 1

2016-05-17 17:52:20 +02:00

avr32

Change my mailaddress

2016-05-02 18:37:09 -04:00

blackfin

configs: Re-sync almost all of cmd/Kconfig