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	Both the values and the MMIO addresses that we need during the 64-bit FEL restore are smaller than 2^32, so we don't need to do any 64-bit loads. Change the loads to only load 32 bits worth of data, that saves us some bytes for storing the values. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org>
		
			
				
	
	
		
			82 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			82 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*
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|  * Utility functions for FEL mode, when running SPL in AArch64.
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|  *
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|  * Copyright (c) 2017 Arm Ltd.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <asm-offsets.h>
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| #include <config.h>
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| #include <asm/system.h>
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| #include <linux/linkage.h>
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| 
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| /*
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|  * We don't overwrite save_boot_params() here, to save the FEL state upon
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|  * entry, since this would run *after* the RMR reset, which clobbers that
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|  * state.
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|  * Instead we store the state _very_ early in the boot0 hook, *before*
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|  * resetting to AArch64.
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|  */
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| 
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| /*
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|  * The FEL routines in BROM run in AArch32.
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|  * Reset back into 32-bit mode here and restore the saved FEL state
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|  * afterwards.
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|  * Resetting back into AArch32/EL3 using the RMR always enters the BROM,
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|  * but we can use the CPU hotplug mechanism to branch back to our code
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|  * immediately.
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|  */
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| ENTRY(return_to_fel)
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| 	/*
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| 	 * the RMR reset will clear all registers, so save the arguments
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| 	 * (LR and SP) in the fel_stash structure, which we read anyways later
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| 	 */
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| 	adr	x2, fel_stash
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| 	str	w0, [x2]
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| 	str	w1, [x2, #4]
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| 
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| 	adr	x1, fel_stash_addr	// to find the fel_stash address in AA32
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| 	str	w2, [x1]
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| 
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| 	ldr	w0, =0xfa50392f		// CPU hotplug magic
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| #ifdef CONFIG_MACH_SUN50I_H616
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| 	ldr	w2, =(SUNXI_R_CPUCFG_BASE + 0x1c0)
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| 	str	w0, [x2], #0x4
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| #elif CONFIG_MACH_SUN50I_H6
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| 	ldr	w2, =(SUNXI_RTC_BASE + 0x1b8)	// BOOT_CPU_HP_FLAG_REG
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| 	str	w0, [x2], #0x4
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| #else
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| 	ldr	w2, =(SUNXI_CPUCFG_BASE + 0x1a4) // offset for CPU hotplug base
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| 	str	w0, [x2, #0x8]
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| #endif
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| 	adr	x0, back_in_32
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| 	str	w0, [x2]
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| 
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| 	dsb	sy
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| 	isb	sy
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| 	mov	x0, #2			// RMR reset into AArch32
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| 	dsb	sy
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| 	msr	RMR_EL3, x0
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| 	isb	sy
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| 1:	wfi
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| 	b	1b
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| 
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| /* AArch32 code to restore the state from fel_stash and return back to FEL. */
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| back_in_32:
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| 	.word	0xe59f0028	// ldr	r0, [pc, #40]	; load fel_stash address
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| 	.word	0xe5901008	// ldr	r1, [r0, #8]
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| 	.word	0xe129f001	// msr	CPSR_fc, r1
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| 	.word	0xf57ff06f	// isb
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| 	.word	0xe590d000	// ldr	sp, [r0]
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| 	.word	0xe590e004	// ldr	lr, [r0, #4]
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| 	.word	0xe5901010	// ldr	r1, [r0, #16]
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| 	.word	0xee0c1f10	// mcr	15, 0, r1, cr12, cr0, {0} ; VBAR
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| 	.word	0xe590100c	// ldr	r1, [r0, #12]
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| 	.word	0xee011f10	// mcr	15, 0, r1, cr1, cr0, {0}  ; SCTLR
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| 	.word	0xf57ff06f	// isb
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| 	.word	0xe12fff1e	// bx	lr		; return to FEL
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| fel_stash_addr:
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| 	.word   0x00000000	// receives fel_stash addr, by AA64 code above
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| ENDPROC(return_to_fel)
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