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bd50cb5cde
Add default STM32MP13xx debug UART initialization. This is similar to STM32MP15xx debug UART initialization, except the RCC registers are at different offsets and the UART pinmux pins are different. Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
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/*
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* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
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*/
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#include <config.h>
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#include <debug_uart.h>
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#include <asm/io.h>
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#include <asm/arch/stm32.h>
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#include <linux/bitops.h>
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#if IS_ENABLED(CONFIG_STM32MP13X)
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#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0700)
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#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0768)
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#elif IS_ENABLED(CONFIG_STM32MP15X)
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#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00)
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#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28)
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#endif
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#define GPIOA_BASE 0x50002000
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#define GPIOG_BASE 0x50008000
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void board_debug_uart_init(void)
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{
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if (CONFIG_DEBUG_UART_BASE != STM32_UART4_BASE)
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return;
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/* UART4 clock enable */
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setbits_le32(RCC_MP_APB1ENSETR, BIT(16));
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if (IS_ENABLED(CONFIG_STM32MP13X)) {
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/* GPIOA clock enable */
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writel(BIT(0), RCC_MP_AHB4ENSETR);
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/* GPIO configuration for DH boards: Uart4 TX = A9 */
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writel(0xfffbffff, GPIOA_BASE + 0x00);
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writel(0x00000080, GPIOA_BASE + 0x24);
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} else if (IS_ENABLED(CONFIG_STM32MP15X)) {
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/* GPIOG clock enable */
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writel(BIT(6), RCC_MP_AHB4ENSETR);
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/* GPIO configuration for ST boards: Uart4 TX = G11 */
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writel(0xffbfffff, GPIOG_BASE + 0x00);
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writel(0x00006000, GPIOG_BASE + 0x24);
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}
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}
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