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	Without this patch SPARC/LEON does not build. Reported-by: Tom Rini <trini@ti.com> Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
		
			
				
	
	
		
			132 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			132 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* Initializes CPU and basic hardware such as memory
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|  * controllers, IRQ controller and system timer 0.
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|  *
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|  * (C) Copyright 2007
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|  * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <common.h>
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| #include <asm/asi.h>
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| #include <asm/leon.h>
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| 
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| #include <config.h>
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| 
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| #define TIMER_BASE_CLK 1000000
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| #define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| /* reset CPU (jump to 0, without reset) */
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| void start(void);
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| 
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| struct {
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| 	gd_t gd_area;
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| 	bd_t bd;
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| } global_data;
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| 
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| /*
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|  * Breath some life into the CPU...
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|  *
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|  * Set up the memory map,
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|  * initialize a bunch of registers.
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|  *
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|  * Run from FLASH/PROM:
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|  *  - until memory controller is set up, only registers available
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|  *  - no global variables available for writing
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|  *  - constants available
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|  */
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| 
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| void cpu_init_f(void)
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| {
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| 	LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
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| 
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| 	/* initialize the IRQMP */
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| 	leon2->Interrupt_Force = 0;
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| 	leon2->Interrupt_Pending = 0;
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| 	leon2->Interrupt_Clear = 0xfffe;	/* clear all old pending interrupts */
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| 	leon2->Interrupt_Mask = 0xfffe0000;	/* mask all IRQs */
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| 
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| 	/* cache */
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| 
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|        /* I/O port setup */
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| #ifdef LEON2_IO_PORT_DIR
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|        leon2->PIO_Direction = LEON2_IO_PORT_DIR;
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| #endif
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| #ifdef LEON2_IO_PORT_DATA
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|        leon2->PIO_Data = LEON2_IO_PORT_DATA;
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| #endif
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| #ifdef LEON2_IO_PORT_INT
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|        leon2->PIO_Interrupt = LEON2_IO_PORT_INT;
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| #else
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|        leon2->PIO_Interrupt = 0;
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| #endif
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| }
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| 
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| void cpu_init_f2(void)
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| {
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| 
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| }
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| 
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| /*
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|  * initialize higher level parts of CPU like time base and timers
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|  */
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| int cpu_init_r(void)
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| {
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| 	LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
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| 
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| 	/* initialize prescaler common to all timers to 1MHz */
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| 	leon2->Scaler_Counter = leon2->Scaler_Reload =
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| 	    (((CONFIG_SYS_CLK_FREQ / 1000) + 500) / 1000) - 1;
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| 
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| 	return (0);
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| }
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| 
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| /* Uses Timer 0 to get accurate
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|  * pauses. Max 2 raised to 32 ticks
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|  *
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|  */
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| void cpu_wait_ticks(unsigned long ticks)
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| {
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| 	unsigned long start = get_timer(0);
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| 	while (get_timer(start) < ticks) ;
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| }
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| 
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| /* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
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|  * Return irq number for timer int or a negative number for
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|  * dealing with self
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|  */
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| int timer_interrupt_init_cpu(void)
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| {
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| 	LEON2_regs *leon2 = (LEON2_regs *) LEON2_PREGS;
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| 
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| 	/* SYS_HZ ticks per second */
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| 	leon2->Timer_Counter_1 = 0;
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| 	leon2->Timer_Reload_1 = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
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| 	leon2->Timer_Control_1 =
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| 	    (LEON2_TIMER_CTRL_EN | LEON2_TIMER_CTRL_RS | LEON2_TIMER_CTRL_LD);
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| 
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| 	return LEON2_TIMER1_IRQNO;
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| }
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| 
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| ulong get_tbclk(void)
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| {
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| 	return TIMER_BASE_CLK;
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| }
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| 
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| /*
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|  * This function is intended for SHORT delays only.
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|  */
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| unsigned long cpu_usec2ticks(unsigned long usec)
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| {
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| 	if (usec < US_PER_TICK)
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| 		return 1;
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| 	return usec / US_PER_TICK;
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| }
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| 
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| unsigned long cpu_ticks2usec(unsigned long ticks)
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| {
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| 	return ticks * US_PER_TICK;
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| }
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