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d0487da83f
This CPU core is old, no boards using the CPU are left in mainline, it has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
34 lines
750 B
C
34 lines
750 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2009
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* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* (C) Copyright 2007-2012
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* Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
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#define TSTR 0x4
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#define TCR0 0x10
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#endif /* CONFIG_CPU_SH4 */
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#define TCR_TPSC 0x07
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#define TSTR_STR0 BIT(0)
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int timer_init(void)
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{
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writew(readw(TMU_BASE + TCR0) & ~TCR_TPSC, TMU_BASE + TCR0);
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writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR);
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writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR);
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return 0;
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}
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