Lokesh Vutla 9b88a4bda2 arm: am33xx: Avoid writing into reserved DPLL divider ...

DPLL DRR doesn't have an M4 divider. But the clock driver is trying
to configure M4 divider as 4(writing into a reserved register).
Fixing it by making M4 divider as -1.

Reported-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

2018-01-19 15:49:24 -05:00

..

arc

ARC: cache: explicitly initialize "*_exists" variables

2017-12-11 11:36:22 +03:00

arm

arm: am33xx: Avoid writing into reserved DPLL divider

2018-01-19 15:49:24 -05:00

m68k

m68k: Use asm-generic/io.h

2017-10-02 21:52:20 -04:00

microblaze

microblaze: Use asm-generic/io.h

2017-10-02 21:52:21 -04:00

mips

MIPS: Break out of cache loops for unimplemented caches

2017-11-28 21:59:30 +01:00

nds32

nds32: dts: Support ftsdc010 DM.

2017-11-30 10:04:21 +08:00

nios2

nios2: 10m50: Add CPU pre-relocation in device tree

2017-11-17 10:51:24 -05:00

powerpc

drivers/misc: Share qbman init between archs

2018-01-10 12:28:47 -08:00

riscv

riscv: Add Kconfig to support RISC-V

2018-01-12 08:05:12 -05:00

sandbox

dm: core: parse chosen node

2018-01-15 11:35:38 -05:00

sh

sh: Use asm-generic/io.h

2017-10-02 21:52:21 -04:00

x86

x86: tangier: Add Bluetooth to ACPI table

2018-01-08 16:52:25 +08:00

xtensa

xtensa: Use asm-generic/io.h

2017-10-02 21:52:22 -04:00

.gitignore

…

Kconfig

riscv: Modify generic codes to support RISC-V

2018-01-12 08:05:12 -05:00