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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
93 lines
2.7 KiB
C
93 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/system_manager.h>
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#include <asm/arch/fpga_manager.h>
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/*
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* Populate the value for SYSMGR.FPGAINTF.MODULE based on pinmux setting.
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* The value is not wrote to SYSMGR.FPGAINTF.MODULE but
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* CONFIG_SYSMGR_ISWGRP_HANDOFF.
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*/
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static void populate_sysmgr_fpgaintf_module(void)
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{
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u32 handoff_val = 0;
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/* ISWGRP_HANDOFF_FPGAINTF */
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writel(0, socfpga_get_sysmgr_addr() + SYSMGR_ISWGRP_HANDOFF_OFFSET(2));
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/* Enable the signal for those HPS peripherals that use FPGA. */
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if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_NAND_USEFPGA) ==
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SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_NAND;
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if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_RGMII1_USEFPGA) ==
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SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_EMAC1;
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if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SDMMC_USEFPGA) ==
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SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_SDMMC;
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if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_RGMII0_USEFPGA) ==
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SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_EMAC0;
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if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SPIM0_USEFPGA) ==
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SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_SPIM0;
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if (readl(socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SPIM1_USEFPGA) ==
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SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_SPIM1;
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/* populate (not writing) the value for SYSMGR.FPGAINTF.MODULE
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based on pinmux setting */
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setbits_le32(socfpga_get_sysmgr_addr() +
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SYSMGR_ISWGRP_HANDOFF_OFFSET(2),
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handoff_val);
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handoff_val = readl(socfpga_get_sysmgr_addr() +
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SYSMGR_ISWGRP_HANDOFF_OFFSET(2));
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if (fpgamgr_test_fpga_ready()) {
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/* Enable the required signals only */
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writel(handoff_val,
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socfpga_get_sysmgr_addr() +
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SYSMGR_GEN5_FPGAINFGRP_MODULE);
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}
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}
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/*
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* Configure all the pin muxes
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*/
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void sysmgr_pinmux_init(void)
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{
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u32 regs = (u32)socfpga_get_sysmgr_addr() + SYSMGR_GEN5_EMACIO;
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const u8 *sys_mgr_init_table;
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unsigned int len;
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int i;
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sysmgr_get_pinmux_table(&sys_mgr_init_table, &len);
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for (i = 0; i < len; i++) {
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writel(sys_mgr_init_table[i], regs);
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regs += sizeof(regs);
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}
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populate_sysmgr_fpgaintf_module();
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}
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/*
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* This bit allows the bootrom to configure the IOs after a warm reset.
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*/
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void sysmgr_config_warmrstcfgio(int enable)
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{
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if (enable)
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setbits_le32(socfpga_get_sysmgr_addr() +
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SYSMGR_GEN5_ROMCODEGRP_CTRL,
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SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
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else
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clrbits_le32(socfpga_get_sysmgr_addr() +
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SYSMGR_GEN5_ROMCODEGRP_CTRL,
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SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
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}
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