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	move s3c44b0 to arch_cpu_init and as noone use cpu_init remove it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
		
			
				
	
	
		
			77 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			77 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * (C) Copyright 2004 Texas Insturments
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 *
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 * (C) Copyright 2002
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 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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 * Marius Groeger <mgroeger@sysgo.de>
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 *
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 * (C) Copyright 2002
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 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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 *
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 * See file CREDITS for list of people who contributed to this
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 * project.
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation; either version 2 of
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 * the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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 * MA 02111-1307 USA
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 */
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/*
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 * CPU specific code
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 */
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#include <common.h>
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#include <command.h>
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#include <asm/system.h>
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static void cache_flush(void);
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int cleanup_before_linux (void)
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{
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	/*
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	 * this function is called just before we call linux
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	 * it prepares the processor for linux
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	 *
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	 * we turn off caches etc ...
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	 */
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	disable_interrupts ();
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#ifdef CONFIG_LCD
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	{
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		extern void lcd_disable(void);
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		extern void lcd_panel_disable(void);
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		lcd_disable(); /* proper disable of lcd & panel */
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		lcd_panel_disable();
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	}
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#endif
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	/* turn off I/D-cache */
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	icache_disable();
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	dcache_disable();
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	/* flush I/D-cache */
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	cache_flush();
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	return 0;
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}
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static void cache_flush(void)
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{
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	unsigned long i = 0;
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	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));  /* invalidate both caches and flush btb */
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	asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i)); /* mem barrier to sync things */
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}
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