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Add support for CZ.NIC Turris 1.x routers. CZ.NIC Turris 1.0 (RTRS01) and 1.1 (RTRS02) are open source routers, they have dual-core PowerPC Freescale P2020 CPU and are based on reference Freescale P2020RDB-PC-A board design. Hardware design is fully open source, all firmware and hardware design files are available at Turris project website: https://docs.turris.cz/hw/turris-1x/turris-1x/ https://project.turris.cz/en/hardware.html The P2020 BootROM can load U-Boot either from NOR flash or from SD card. We add the new defconfigs, turris_1x_nor_defconfig, which configures U-Boot for building the NOR image, and turris_1x_sdcard_defconfig, which configures U-Boot for building an image suitable for SD card. The defconfig for NOR image is stripped-down a - many config options enabled in SD defconfig are disabled for NOR defconfig. This is because U-Boot grew non-trivially in the last two years and it would not fit into the space allocated for U-Boot in the NOR memory. In the future we may try to use LTO to reduce the size of the code and enable more options. The design of CZ.NIC Turris 1.x routers is based on Freescale P2020RDB-PC-A board, so some code from boards/freescale/p1_p2_rdb_pc is used and linked into Turris 1.x board code. Turris 1.x code in this patch uses modern distroboot and can boot Linux kernel from various locations, including NAND, SD card, USB flash disks, NVMe disks or SATA disks (connected to extra SATA/SCSI PCIe controllers). Via distroboot is implemented also rescue NOR boot for factory recovery, triggered by reset button, like on other existing Turris routers. SD boot with RAM larger than 2GB will only allocate 2GB of RAM (We were not able to fix this yet) [ Because various CONFIG_ macros were migrated to Kconfig since the last time this worked on upstream U-Boot (in 2022), a non-trivial rebasing was needed and some issues were solved. ] Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Mojík <marek.mojik@nic.cz> Reviewed-by: Marek Behún <kabel@kernel.org>
Overview
--------
P1_P2_RDB_PC represents a set of boards including
P1020MSBG-PC
P1020RDB-PC
P1020RDB-PD
P1021RDB-PC
P1024RDB
P2020RDB-PC
They have similar design of P1020RDB but have DDR3 instead of DDR2. P2020RDB-PC
has 64-bit DDR. All others have 32-bit DDR.
Key features on these boards include:
* DDR3
* NOR flash
* NAND flash (on RDB's only)
* SPI flash (on RDB's only)
* SDHC/MMC card slot
* VSC7385 Ethernet switch (on P1020MBG, P1020RDB, & P1021RDB)
* PCIE slot and mini-PCIE slots
As these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM
is used to store SPD data. In case of absent or corrupted SPD, falling back
to timing data embedded in the source code will be used. Raw timing data is
extracted from DDR chip datasheet. Different speeds of DDR are supported with
this approach. ODT option is forced to fit this set of boards, again because
they don't have regular DIMMs.
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet specification
for writing timing.
VSC firmware Address is defined by default in config file for eTSEC1.
SD width is based off DIP switch. DIP switch is detected on the
board by reading i2c bus and setting the appropriate mux values.
Some boards have QE module in the silicon (P1021 and P1025). QE and eLBC have
pins multiplexing. QE function needs to be disabled to access Nor Flash and
CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting "qe"
in hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to
enable QE-TDM for linux kernel, set "qe;tdm" in hwconfig. Syntax is as below
'setenv hwconfig qe' to enable QE UEC/UART and disable Nor-Flash/CPLD.
'setenv hwconfig 'qe;tdm'' to enalbe QE TDM and disable Nor-Flash/CPLD.
Device tree support and how to enable it for different configs
--------------------------------------------------------------
Device tree support is available for p1020rdb and p2020rdb for below mentioned boot,
1. NOR Boot
2. NAND Boot
3. SD Boot
4. SPIFLASH Boot
To enable device tree support for other boot, below configs need to be
enabled in relative defconfig file,
1. CONFIG_DEFAULT_DEVICE_TREE="p1020rdb" (Change default device tree name if required)
2. CONFIG_OF_CONTROL
3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at
CFG_RESET_VECTOR_ADDRESS - 0xffc
If device tree support is enabled in defconfig,
1. use 'u-boot.bin' for NOR boot.
2. use 'u-boot-with-spl.bin' for other boot.