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4a065abf92
Add support watchdog for SH4A core (SH7763, SH7780 and SH7785). And fix some compile warning. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
72 lines
1.5 KiB
C
72 lines
1.5 KiB
C
/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#define WDT_BASE WTCNT
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#define WDT_WD (1 << 6)
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#define WDT_RST_P (0)
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#define WDT_RST_M (1 << 5)
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#define WDT_ENABLE (1 << 7)
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#if defined(CONFIG_WATCHDOG)
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static unsigned char csr_read(void)
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{
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return inb(WDT_BASE + 0x04);
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}
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static void cnt_write(unsigned char value)
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{
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outl((unsigned short)value | 0x5A00, WDT_BASE + 0x00);
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}
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static void csr_write(unsigned char value)
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{
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outl((unsigned short)value | 0xA500, WDT_BASE + 0x04);
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}
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void watchdog_reset(void)
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{
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outl(0x55000000, WDT_BASE + 0x08);
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}
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int watchdog_init(void)
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{
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/* Set overflow time*/
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cnt_write(0);
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/* Power on reset */
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csr_write(WDT_WD|WDT_RST_P|WDT_ENABLE);
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return 0;
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}
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int watchdog_disable(void)
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{
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csr_write(csr_read() & ~WDT_ENABLE);
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return 0;
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}
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#endif
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void reset_cpu(unsigned long ignored)
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{
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while (1)
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;
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}
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