Hou Zhiqiang 5b994e85a5 armv8: ls1043a: correct the PCIe INTx fixup ...

On LS1043A rev1.0 there are 4 interrupt pins for INTx, and on
rev1.1 there is only 1 for INTx, so the current fixup is inverse
of the fact.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

2019-01-17 13:16:44 -08:00

..

fsl-layerscape

armv8: ls1043a: correct the PCIe INTx fixup

2019-01-17 13:16:44 -08:00

hisilicon

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cpu.c

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exceptions.S

armv8: Reduce exception handling code

2018-08-03 19:53:54 -04:00

fwcall.c

efi_loader: PSCI reset and shutdown

2018-12-02 21:59:37 +01:00

generic_timer.c

arm: timer: sunxi: add Allwinner timer erratum workaround

2018-07-03 22:00:00 +05:30

Kconfig

efi_loader: PSCI reset and shutdown

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Makefile

armv8: make SPL exception vectors optional

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psci.S

ARMv8: SError exception handling in PSCI exception vectors

2018-11-16 13:34:34 -05:00

sec_firmware_asm.S

armv8: sec_firmware: change el2_to_aarch32 SMC ID

2018-12-06 14:37:19 -08:00

sec_firmware.c

armv8: sec_firmware: return job ring status as true in TFABOOT

2018-12-06 14:37:19 -08:00

smccc-call.S

efi_loader: PSCI reset and shutdown

2018-12-02 21:59:37 +01:00

spin_table_v8.S

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spin_table.c

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start.S

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tlb.S

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u-boot-spl.lds

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u-boot.lds

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