Duy Nguyen ad005d8a77 dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V4M (R8A779H0) SoC.

The current version is imported from:
https://lore.kernel.org/linux-renesas-soc/11acbd2a30b58607474e9c32eb798b3a00e85e73.1706194617.git.geert+renesas@glider.be/

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
2024-02-10 17:08:06 +01:00
..
2019-10-25 17:20:43 +02:00
2019-10-08 16:33:45 +02:00
2023-10-16 14:02:38 +02:00
2021-06-17 09:40:57 +08:00