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https://source.denx.de/u-boot/u-boot.git
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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
100 lines
2.5 KiB
C
100 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Broadcom.
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <usb.h>
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#include <asm/io.h>
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#include <dm/device_compat.h>
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#include <usb/xhci.h>
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#define DRD2U3H_XHC_REGS_AXIWRA 0xC08
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#define DRD2U3H_XHC_REGS_AXIRDA 0xC0C
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#define USBAXI_CACHE 0xF
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#define USBAXI_PROT 0x8
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#define USBAXI_SA_MASK 0x1FF
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#define USBAXI_UA_MASK (0x1FF << 16)
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#define USBAXI_SA_VAL ((USBAXI_CACHE << 4) | USBAXI_PROT)
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#define USBAXI_UA_VAL (USBAXI_SA_VAL << 16)
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#define USBAXI_SA_UA_MASK (USBAXI_UA_MASK | USBAXI_SA_MASK)
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#define USBAXI_SA_UA_VAL (USBAXI_UA_VAL | USBAXI_SA_VAL)
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struct brcm_xhci_plat {
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unsigned int arcache;
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unsigned int awcache;
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void __iomem *hc_base;
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};
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static int xhci_brcm_probe(struct udevice *dev)
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{
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struct brcm_xhci_plat *plat = dev_get_plat(dev);
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struct xhci_hcor *hcor;
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struct xhci_hccr *hcd;
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int len, ret = 0;
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if (!plat) {
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dev_err(dev, "Can't get xHCI Plat data\n");
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return -ENOMEM;
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}
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hcd = dev_read_addr_ptr(dev);
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if (!hcd) {
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dev_err(dev, "Can't get the xHCI register base address\n");
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return -ENXIO;
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}
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plat->hc_base = hcd;
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len = HC_LENGTH(xhci_readl(&hcd->cr_capbase));
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hcor = (struct xhci_hcor *)(plat->hc_base + len);
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/* Save the default values of AXI read and write attributes */
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plat->awcache = readl(plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA);
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plat->arcache = readl(plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA);
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/* Enable AXI write attributes */
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clrsetbits_le32(plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA,
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USBAXI_SA_UA_MASK, USBAXI_SA_UA_VAL);
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/* Enable AXI read attributes */
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clrsetbits_le32(plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA,
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USBAXI_SA_UA_MASK, USBAXI_SA_UA_VAL);
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ret = xhci_register(dev, hcd, hcor);
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if (ret)
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dev_err(dev, "Failed to register xHCI\n");
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return ret;
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}
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static int xhci_brcm_deregister(struct udevice *dev)
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{
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struct brcm_xhci_plat *plat = dev_get_plat(dev);
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/* Restore the default values for AXI read and write attributes */
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writel(plat->awcache, plat->hc_base + DRD2U3H_XHC_REGS_AXIWRA);
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writel(plat->arcache, plat->hc_base + DRD2U3H_XHC_REGS_AXIRDA);
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return xhci_deregister(dev);
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}
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static const struct udevice_id xhci_brcm_ids[] = {
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{ .compatible = "brcm,generic-xhci" },
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{ }
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};
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U_BOOT_DRIVER(usb_xhci) = {
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.name = "xhci_brcm",
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.id = UCLASS_USB,
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.probe = xhci_brcm_probe,
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.remove = xhci_brcm_deregister,
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.ops = &xhci_usb_ops,
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.of_match = xhci_brcm_ids,
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.plat_auto = sizeof(struct brcm_xhci_plat),
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.priv_auto = sizeof(struct xhci_ctrl),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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