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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
56 lines
1.4 KiB
C
56 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2015 Broadcom Corporation.
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*/
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#include <config.h>
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/sysmap.h>
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#include <asm/kona-common/clk.h>
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#include <linux/delay.h>
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#include "dwc2_udc_otg_priv.h"
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#include "bcm_udc_otg.h"
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void otg_phy_init(struct dwc2_udc *dev)
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{
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/* turn on the USB OTG clocks */
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clk_usb_otg_enable((void *)HSOTG_BASE_ADDR);
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/* set Phy to driving mode */
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wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
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HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
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udelay(100);
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/* clear Soft Disconnect */
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wfld_clear(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
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HSOTG_DCTL_SFTDISCON_MASK);
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/* invoke Reset (active low) */
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wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
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HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
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/* Reset needs to be asserted for 2ms */
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udelay(2000);
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/* release Reset */
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wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
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HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK,
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HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK);
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}
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void otg_phy_off(struct dwc2_udc *dev)
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{
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/* Soft Disconnect */
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wfld_set(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET,
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HSOTG_DCTL_SFTDISCON_MASK,
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HSOTG_DCTL_SFTDISCON_MASK);
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/* set Phy to non-driving (reset) mode */
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wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET,
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HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK,
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HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK);
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}
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