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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
77 lines
1.9 KiB
C
77 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020 Microchip Technology Inc.
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* Padmarao Begari <padmarao.begari@microchip.com>
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*/
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#include <common.h>
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#include <clk.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <log.h>
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#include <dm/device.h>
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#include <dm/devres.h>
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#include <dm/uclass.h>
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#include <dt-bindings/clock/microchip-mpfs-clock.h>
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#include <linux/err.h>
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#include "mpfs_clk.h"
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static int mpfs_clk_probe(struct udevice *dev)
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{
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struct clk *parent_clk = dev_get_priv(dev);
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struct clk clk_msspll = { .id = CLK_MSSPLL };
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void __iomem *base;
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void __iomem *msspll_base;
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int ret;
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base = dev_read_addr_index_ptr(dev, 0);
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if (!base)
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return -EINVAL;
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ret = clk_get_by_index(dev, 0, parent_clk);
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if (ret)
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return ret;
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/*
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* The original devicetrees for mpfs messed up & defined the msspll's
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* output as a fixed-frequency, 600 MHz clock & used that as the input
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* for the clock controller node. The msspll is however not a fixed
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* frequency clock and later devicetrees handled this properly. Check
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* the devicetree & if it is one of the fixed ones, register the msspll.
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* Otherwise, skip registering it & pass the reference clock directly
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* to the cfg clock registration function.
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*/
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msspll_base = dev_read_addr_index_ptr(dev, 1);
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if (msspll_base) {
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ret = mpfs_clk_register_msspll(msspll_base, parent_clk);
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if (ret)
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return ret;
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clk_request(dev, &clk_msspll);
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parent_clk = &clk_msspll;
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}
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ret = mpfs_clk_register_cfgs(base, parent_clk);
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if (ret)
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return ret;
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ret = mpfs_clk_register_periphs(base, dev);
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return ret;
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}
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static const struct udevice_id mpfs_of_match[] = {
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{ .compatible = "microchip,mpfs-clkcfg" },
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{ }
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};
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U_BOOT_DRIVER(mpfs_clk) = {
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.name = "mpfs_clk",
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.id = UCLASS_CLK,
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.of_match = mpfs_of_match,
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.ops = &ccf_clk_ops,
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.probe = mpfs_clk_probe,
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.priv_auto = sizeof(struct clk),
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.flags = DM_FLAG_PRE_RELOC,
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};
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