Rafal Jaworowski
dec99558b9
[ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.A
...
This brings back separate settings for PCIe bus numbers depending on chip
revision, which got eliminated in 2b393b0f0af8402ef43b25c1968bfd29714ddffa
commit. 440SPe rev. A does NOT work properly with the same settings as for
the rev. B (no devices are seen on the bus during enumeration).
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-08-02 08:25:18 +02:00
..
2007-06-22 14:58:04 +02:00
2007-05-09 11:41:58 +01:00
2006-10-09 01:02:05 +02:00
2006-10-28 17:13:12 +02:00
2006-10-09 01:02:05 +02:00
2006-10-09 01:02:05 +02:00
2006-10-09 01:02:05 +02:00
2006-10-09 01:02:05 +02:00
2007-04-18 16:53:52 +02:00
2007-04-05 18:33:04 +08:00
2007-04-05 18:31:18 +08:00
2007-04-05 18:31:18 +08:00
2007-05-15 23:15:10 +02:00
2007-04-23 12:00:22 +02:00
2006-10-09 01:02:05 +02:00
2007-01-23 13:25:22 +01:00
2007-05-08 15:57:43 +02:00
2006-10-09 01:02:05 +02:00
2007-06-22 23:59:00 +02:00
2007-07-11 20:11:07 +02:00
2007-06-22 14:58:04 +02:00
2007-07-03 15:07:56 +02:00
2007-07-03 15:07:56 +02:00
2007-07-03 15:07:56 +02:00
2007-06-22 14:58:04 +02:00
2007-06-22 14:58:04 +02:00
2007-06-22 23:59:00 +02:00
2006-10-09 01:02:05 +02:00
2006-10-09 01:02:05 +02:00
2007-08-02 08:25:18 +02:00
2007-02-20 09:05:45 +01:00
2006-10-09 01:02:05 +02:00
2006-10-09 01:02:05 +02:00