Nikhil Badola f7ff0e5e96 armv8/lsch3/config: Define USB XHCI controller base address for LS2085A ...

Define base address of both usb xhci controllers in lsch3 config
in the format (IMMR + offset) for LS2085A

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

2015-08-03 12:06:39 -07:00

..

clock.h

armv8/ls2085a: Enable DSPI get input clk form 'mxc_get_clock'

2015-07-20 11:44:39 -07:00

config.h

armv8/lsch3/config: Define USB XHCI controller base address for LS2085A

2015-08-03 12:06:39 -07:00

fdt.h

armv8/fsl-lsch3: device tree fixups for PCI stream IDs

2015-07-20 11:44:37 -07:00

fsl_serdes.h

armv8: Add SerDes framework for Layerscape Architecture

2015-04-23 08:55:57 -07:00

gpio.h

ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC

2014-07-03 08:40:51 +02:00

immap_lsch3.h

driver/ldpaa: Add support of WRIOP static data structure

2015-04-23 08:55:58 -07:00

imx-regs.h

ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC

2014-07-03 08:40:51 +02:00

ls2085a_stream_id.h

armv8/fsl-lsch3: partition stream IDs

2015-07-20 11:44:37 -07:00

soc.h

armv8/fsl-ch3: Add support to print SoC personality

2015-07-20 11:44:34 -07:00