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	Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> Acked-by: Tom Rini <trini@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Conflicts: drivers/gpio/Makefile
		
			
				
	
	
		
			222 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			222 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Code ported from Nomadik GPIO driver in ST-Ericsson Linux kernel code.
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|  * The purpose is that GPIO config found in kernel should work by simply
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|  * copy-paste it to U-boot.
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|  *
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|  * Original Linux authors:
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|  * Copyright (C) 2008,2009 STMicroelectronics
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|  * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
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|  *   Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
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|  *
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|  * Ported to U-boot by:
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|  * Copyright (C) 2010 Joakim Axelsson <joakim.axelsson AT stericsson.com>
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| 
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| #include <common.h>
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| #include <asm/io.h>
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| 
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| #include <asm/arch/db8500_gpio.h>
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| #include <asm/arch/db8500_pincfg.h>
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| #include <linux/compiler.h>
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| 
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| #define IO_ADDR(x) (void *) (x)
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| 
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| /*
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|  * The GPIO module in the db8500 Systems-on-Chip is an
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|  * AMBA device, managing 32 pins and alternate functions. The logic block
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|  * is currently only used in the db8500.
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|  */
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| 
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| #define GPIO_TOTAL_PINS		268
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| #define GPIO_PINS_PER_BLOCK	32
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| #define GPIO_BLOCKS_COUNT	(GPIO_TOTAL_PINS/GPIO_PINS_PER_BLOCK + 1)
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| #define GPIO_BLOCK(pin)		(((pin + GPIO_PINS_PER_BLOCK) >> 5) - 1)
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| #define GPIO_PIN_WITHIN_BLOCK(pin)	((pin)%(GPIO_PINS_PER_BLOCK))
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| 
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| /* Register in the logic block */
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| #define DB8500_GPIO_DAT		0x00
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| #define DB8500_GPIO_DATS	0x04
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| #define DB8500_GPIO_DATC	0x08
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| #define DB8500_GPIO_PDIS	0x0c
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| #define DB8500_GPIO_DIR		0x10
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| #define DB8500_GPIO_DIRS	0x14
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| #define DB8500_GPIO_DIRC	0x18
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| #define DB8500_GPIO_SLPC	0x1c
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| #define DB8500_GPIO_AFSLA	0x20
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| #define DB8500_GPIO_AFSLB	0x24
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| 
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| #define DB8500_GPIO_RIMSC	0x40
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| #define DB8500_GPIO_FIMSC	0x44
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| #define DB8500_GPIO_IS		0x48
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| #define DB8500_GPIO_IC		0x4c
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| #define DB8500_GPIO_RWIMSC	0x50
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| #define DB8500_GPIO_FWIMSC	0x54
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| #define DB8500_GPIO_WKS		0x58
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| 
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| static void __iomem *get_gpio_addr(unsigned gpio)
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| {
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| 	/* Our list of GPIO chips */
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| 	static void __iomem *gpio_addrs[GPIO_BLOCKS_COUNT] = {
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| 		IO_ADDR(CFG_GPIO_0_BASE),
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| 		IO_ADDR(CFG_GPIO_1_BASE),
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| 		IO_ADDR(CFG_GPIO_2_BASE),
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| 		IO_ADDR(CFG_GPIO_3_BASE),
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| 		IO_ADDR(CFG_GPIO_4_BASE),
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| 		IO_ADDR(CFG_GPIO_5_BASE),
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| 		IO_ADDR(CFG_GPIO_6_BASE),
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| 		IO_ADDR(CFG_GPIO_7_BASE),
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| 		IO_ADDR(CFG_GPIO_8_BASE)
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| 	};
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| 
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| 	return gpio_addrs[GPIO_BLOCK(gpio)];
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| }
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| 
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| static unsigned get_gpio_offset(unsigned gpio)
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| {
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| 	return GPIO_PIN_WITHIN_BLOCK(gpio);
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| }
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| 
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| /* Can only be called from config_pin. Don't configure alt-mode directly */
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| static void gpio_set_mode(unsigned gpio, enum db8500_gpio_alt mode)
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| {
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| 	void __iomem *addr = get_gpio_addr(gpio);
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| 	unsigned offset = get_gpio_offset(gpio);
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| 	u32 bit = 1 << offset;
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| 	u32 afunc, bfunc;
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| 
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| 	afunc = readl(addr + DB8500_GPIO_AFSLA) & ~bit;
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| 	bfunc = readl(addr + DB8500_GPIO_AFSLB) & ~bit;
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| 	if (mode & DB8500_GPIO_ALT_A)
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| 		afunc |= bit;
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| 	if (mode & DB8500_GPIO_ALT_B)
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| 		bfunc |= bit;
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| 	writel(afunc, addr + DB8500_GPIO_AFSLA);
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| 	writel(bfunc, addr + DB8500_GPIO_AFSLB);
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| }
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| 
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| /**
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|  * db8500_gpio_set_pull() - enable/disable pull up/down on a gpio
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|  * @gpio: pin number
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|  * @pull: one of DB8500_GPIO_PULL_DOWN, DB8500_GPIO_PULL_UP,
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|  *  and DB8500_GPIO_PULL_NONE
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|  *
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|  * Enables/disables pull up/down on a specified pin.  This only takes effect if
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|  * the pin is configured as an input (either explicitly or by the alternate
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|  * function).
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|  *
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|  * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
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|  * configured as an input.  Otherwise, due to the way the controller registers
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|  * work, this function will change the value output on the pin.
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|  */
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| void db8500_gpio_set_pull(unsigned gpio, enum db8500_gpio_pull pull)
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| {
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| 	void __iomem *addr = get_gpio_addr(gpio);
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| 	unsigned offset = get_gpio_offset(gpio);
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| 	u32 bit = 1 << offset;
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| 	u32 pdis;
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| 
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| 	pdis = readl(addr + DB8500_GPIO_PDIS);
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| 	if (pull == DB8500_GPIO_PULL_NONE)
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| 		pdis |= bit;
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| 	else
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| 		pdis &= ~bit;
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| 	writel(pdis, addr + DB8500_GPIO_PDIS);
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| 
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| 	if (pull == DB8500_GPIO_PULL_UP)
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| 		writel(bit, addr + DB8500_GPIO_DATS);
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| 	else if (pull == DB8500_GPIO_PULL_DOWN)
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| 		writel(bit, addr + DB8500_GPIO_DATC);
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| }
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| 
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| void db8500_gpio_make_input(unsigned gpio)
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| {
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| 	void __iomem *addr = get_gpio_addr(gpio);
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| 	unsigned offset = get_gpio_offset(gpio);
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| 
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| 	writel(1 << offset, addr + DB8500_GPIO_DIRC);
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| }
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| 
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| int db8500_gpio_get_input(unsigned gpio)
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| {
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| 	void __iomem *addr = get_gpio_addr(gpio);
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| 	unsigned offset = get_gpio_offset(gpio);
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| 	u32 bit = 1 << offset;
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| 
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| 	printf("db8500_gpio_get_input gpio=%u addr=%p offset=%u bit=%#x\n",
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| 		gpio, addr, offset, bit);
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| 
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| 	return (readl(addr + DB8500_GPIO_DAT) & bit) != 0;
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| }
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| 
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| void db8500_gpio_make_output(unsigned gpio, int val)
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| {
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| 	void __iomem *addr = get_gpio_addr(gpio);
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| 	unsigned offset = get_gpio_offset(gpio);
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| 
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| 	writel(1 << offset, addr + DB8500_GPIO_DIRS);
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| 	db8500_gpio_set_output(gpio, val);
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| }
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| 
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| void db8500_gpio_set_output(unsigned gpio, int val)
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| {
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| 	void __iomem *addr = get_gpio_addr(gpio);
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| 	unsigned offset = get_gpio_offset(gpio);
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| 
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| 	if (val)
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| 		writel(1 << offset, addr + DB8500_GPIO_DATS);
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| 	else
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| 		writel(1 << offset, addr + DB8500_GPIO_DATC);
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| }
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| 
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| /**
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|  * config_pin - configure a pin's mux attributes
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|  * @cfg: pin confguration
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|  *
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|  * Configures a pin's mode (alternate function or GPIO), its pull up status,
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|  * and its sleep mode based on the specified configuration.  The @cfg is
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|  * usually one of the SoC specific macros defined in mach/<soc>-pins.h.  These
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|  * are constructed using, and can be further enhanced with, the macros in
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|  * plat/pincfg.h.
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|  *
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|  * If a pin's mode is set to GPIO, it is configured as an input to avoid
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|  * side-effects.  The gpio can be manipulated later using standard GPIO API
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|  * calls.
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|  */
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| static void config_pin(unsigned long cfg)
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| {
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| 	int pin = PIN_NUM(cfg);
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| 	int pull = PIN_PULL(cfg);
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| 	int af = PIN_ALT(cfg);
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| 	int output = PIN_DIR(cfg);
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| 	int val = PIN_VAL(cfg);
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| 
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| 	if (output)
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| 		db8500_gpio_make_output(pin, val);
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| 	else {
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| 		db8500_gpio_make_input(pin);
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| 		db8500_gpio_set_pull(pin, pull);
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| 	}
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| 
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| 	gpio_set_mode(pin, af);
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| }
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| 
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| /**
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|  * db8500_config_pins - configure several pins at once
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|  * @cfgs: array of pin configurations
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|  * @num: number of elments in the array
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|  *
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|  * Configures several pins using config_pin(). Refer to that function for
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|  * further information.
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|  */
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| void db8500_gpio_config_pins(unsigned long *cfgs, size_t num)
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| {
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| 	size_t i;
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| 
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| 	for (i = 0; i < num; i++)
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| 		config_pin(cfgs[i]);
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| }
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