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https://source.denx.de/u-boot/u-boot.git
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305 lines
6.8 KiB
C
305 lines
6.8 KiB
C
/*
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* Analog Devices SPI3 controller driver
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*
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* Copyright (c) 2011 Analog Devices Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/blackfin.h>
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#include <asm/clock.h>
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#include <asm/gpio.h>
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#include <asm/portmux.h>
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#include <asm/mach-common/bits/spi6xx.h>
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struct bfin_spi_slave {
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struct spi_slave slave;
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u32 control, clock;
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struct bfin_spi_regs *regs;
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int cs_pol;
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};
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#define to_bfin_spi_slave(s) container_of(s, struct bfin_spi_slave, slave)
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#define gpio_cs(cs) ((cs) - MAX_CTRL_CS)
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#ifdef CONFIG_BFIN_SPI_GPIO_CS
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# define is_gpio_cs(cs) ((cs) > MAX_CTRL_CS)
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#else
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# define is_gpio_cs(cs) 0
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#endif
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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if (is_gpio_cs(cs))
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return gpio_is_valid(gpio_cs(cs));
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else
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return (cs >= 1 && cs <= MAX_CTRL_CS);
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
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if (is_gpio_cs(slave->cs)) {
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unsigned int cs = gpio_cs(slave->cs);
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gpio_set_value(cs, bss->cs_pol);
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} else {
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u32 ssel;
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ssel = bfin_read32(&bss->regs->ssel);
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ssel |= 1 << slave->cs;
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if (bss->cs_pol)
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ssel |= (1 << 8) << slave->cs;
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else
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ssel &= ~((1 << 8) << slave->cs);
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bfin_write32(&bss->regs->ssel, ssel);
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}
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SSYNC();
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}
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
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if (is_gpio_cs(slave->cs)) {
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unsigned int cs = gpio_cs(slave->cs);
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gpio_set_value(cs, !bss->cs_pol);
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} else {
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u32 ssel;
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ssel = bfin_read32(&bss->regs->ssel);
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if (bss->cs_pol)
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ssel &= ~((1 << 8) << slave->cs);
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else
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ssel |= (1 << 8) << slave->cs;
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/* deassert cs */
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bfin_write32(&bss->regs->ssel, ssel);
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SSYNC();
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/* disable cs */
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ssel &= ~(1 << slave->cs);
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bfin_write32(&bss->regs->ssel, ssel);
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}
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SSYNC();
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}
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void spi_init()
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{
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}
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#define SPI_PINS(n) \
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{ 0, P_SPI##n##_SCK, P_SPI##n##_MISO, P_SPI##n##_MOSI, 0 }
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static unsigned short pins[][5] = {
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#ifdef SPI0_REGBASE
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[0] = SPI_PINS(0),
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#endif
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#ifdef SPI1_REGBASE
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[1] = SPI_PINS(1),
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#endif
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#ifdef SPI2_REGBASE
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[2] = SPI_PINS(2),
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#endif
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};
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#define SPI_CS_PINS(n) \
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{ \
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P_SPI##n##_SSEL1, P_SPI##n##_SSEL2, P_SPI##n##_SSEL3, \
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P_SPI##n##_SSEL4, P_SPI##n##_SSEL5, P_SPI##n##_SSEL6, \
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P_SPI##n##_SSEL7, \
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}
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static const unsigned short cs_pins[][7] = {
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#ifdef SPI0_REGBASE
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[0] = SPI_CS_PINS(0),
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#endif
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#ifdef SPI1_REGBASE
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[1] = SPI_CS_PINS(1),
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#endif
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#ifdef SPI2_REGBASE
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[2] = SPI_CS_PINS(2),
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#endif
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};
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void spi_set_speed(struct spi_slave *slave, uint hz)
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{
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struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
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ulong clk;
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u32 clock;
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clk = get_spi_clk();
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clock = clk / hz;
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if (clock)
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clock--;
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bss->clock = clock;
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}
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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{
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struct bfin_spi_slave *bss;
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u32 reg_base;
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if (!spi_cs_is_valid(bus, cs))
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return NULL;
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switch (bus) {
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#ifdef SPI0_REGBASE
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case 0:
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reg_base = SPI0_REGBASE;
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break;
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#endif
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#ifdef SPI1_REGBASE
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case 1:
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reg_base = SPI1_REGBASE;
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break;
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#endif
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#ifdef SPI2_REGBASE
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case 2:
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reg_base = SPI2_REGBASE;
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break;
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#endif
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default:
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debug("%s: invalid bus %u\n", __func__, bus);
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return NULL;
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}
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bss = spi_alloc_slave(struct bfin_spi_slave, bus, cs);
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if (!bss)
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return NULL;
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bss->regs = (struct bfin_spi_regs *)reg_base;
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bss->control = SPI_CTL_EN | SPI_CTL_MSTR;
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if (mode & SPI_CPHA)
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bss->control |= SPI_CTL_CPHA;
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if (mode & SPI_CPOL)
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bss->control |= SPI_CTL_CPOL;
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if (mode & SPI_LSB_FIRST)
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bss->control |= SPI_CTL_LSBF;
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bss->control &= ~SPI_CTL_ASSEL;
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bss->cs_pol = mode & SPI_CS_HIGH ? 1 : 0;
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spi_set_speed(&bss->slave, max_hz);
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return &bss->slave;
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}
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void spi_free_slave(struct spi_slave *slave)
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{
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struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
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free(bss);
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}
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int spi_claim_bus(struct spi_slave *slave)
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{
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struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
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debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
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if (is_gpio_cs(slave->cs)) {
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unsigned int cs = gpio_cs(slave->cs);
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gpio_request(cs, "bfin-spi");
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gpio_direction_output(cs, !bss->cs_pol);
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pins[slave->bus][0] = P_DONTCARE;
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} else
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pins[slave->bus][0] = cs_pins[slave->bus][slave->cs - 1];
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peripheral_request_list(pins[slave->bus], "bfin-spi");
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bfin_write32(&bss->regs->control, bss->control);
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bfin_write32(&bss->regs->clock, bss->clock);
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bfin_write32(&bss->regs->delay, 0x0);
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bfin_write32(&bss->regs->rx_control, SPI_RXCTL_REN);
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bfin_write32(&bss->regs->tx_control, SPI_TXCTL_TEN | SPI_TXCTL_TTI);
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SSYNC();
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return 0;
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}
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void spi_release_bus(struct spi_slave *slave)
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{
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struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
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debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
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peripheral_free_list(pins[slave->bus]);
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if (is_gpio_cs(slave->cs))
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gpio_free(gpio_cs(slave->cs));
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bfin_write32(&bss->regs->rx_control, 0x0);
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bfin_write32(&bss->regs->tx_control, 0x0);
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bfin_write32(&bss->regs->control, 0x0);
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SSYNC();
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}
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#ifndef CONFIG_BFIN_SPI_IDLE_VAL
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# define CONFIG_BFIN_SPI_IDLE_VAL 0xff
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#endif
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static int spi_pio_xfer(struct bfin_spi_slave *bss, const u8 *tx, u8 *rx,
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uint bytes)
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{
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/* discard invalid rx data and empty rfifo */
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while (!(bfin_read32(&bss->regs->status) & SPI_STAT_RFE))
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bfin_read32(&bss->regs->rfifo);
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while (bytes--) {
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u8 value = (tx ? *tx++ : CONFIG_BFIN_SPI_IDLE_VAL);
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debug("%s: tx:%x ", __func__, value);
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bfin_write32(&bss->regs->tfifo, value);
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SSYNC();
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while (bfin_read32(&bss->regs->status) & SPI_STAT_RFE)
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if (ctrlc())
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return -1;
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value = bfin_read32(&bss->regs->rfifo);
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if (rx)
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*rx++ = value;
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debug("rx:%x\n", value);
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}
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return 0;
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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void *din, unsigned long flags)
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{
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struct bfin_spi_slave *bss = to_bfin_spi_slave(slave);
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const u8 *tx = dout;
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u8 *rx = din;
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uint bytes = bitlen / 8;
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int ret = 0;
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debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
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slave->bus, slave->cs, bitlen, bytes, flags);
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if (bitlen == 0)
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goto done;
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/* we can only do 8 bit transfers */
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if (bitlen % 8) {
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flags |= SPI_XFER_END;
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goto done;
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}
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if (flags & SPI_XFER_BEGIN)
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spi_cs_activate(slave);
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ret = spi_pio_xfer(bss, tx, rx, bytes);
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done:
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if (flags & SPI_XFER_END)
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spi_cs_deactivate(slave);
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return ret;
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}
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