Nishanth Menon d414aae552 OMAP3: Fix SDRC init ...

Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits

Signed-off-by: Nishanth Menon <nm@ti.com>

2009-11-27 16:26:17 -06:00

..

omap3

OMAP3: Fix SDRC init

2009-11-27 16:26:17 -06:00

s5pc1xx

s5pc1xx: support Samsung s5pc1xx SoC

2009-10-13 21:13:55 -05:00

config.mk

arm: Remove -fno-strict-aliasing

2009-09-04 22:15:53 +02:00

cpu.c

OMAP3 Move cache routine to cache.S

2009-10-13 06:17:33 -05:00

Makefile

OMAP3: Add common cpu and start code

2009-01-24 17:51:21 +01:00

start.S

Coding Style cleanup; update CHANGELOG, prepare -rc1

2009-10-28 00:49:47 +01:00

u-boot.lds

arm: unify linker script

2009-06-12 20:39:52 +02:00