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188d7aa4e2
This commit adds Actions Semi S900 CMU register definitions to clock bindings. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
78 lines
1.9 KiB
C
78 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2015 Actions Semi Co., Ltd.
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* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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*
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*/
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#ifndef _DT_BINDINGS_CLOCK_S900_CMU_H_
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#define _DT_BINDINGS_CLOCK_S900_CMU_H_
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/* Module Clock ID */
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#define CLOCK_DDRCH1 0
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#define CLOCK_DMAC 1
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#define CLOCK_DDRCH0 2
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#define CLOCK_BROM 3
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#define CLOCK_NANDC0 4
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#define CLOCK_SD0 5
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#define CLOCK_SD1 6
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#define CLOCK_SD2 7
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#define CLOCK_DE 8
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#define CLOCK_LVDS 9
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#define CLOCK_EDP 10
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#define CLOCK_NANDC1 11
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#define CLOCK_DSI 12
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#define CLOCK_CSI0 13
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#define CLOCK_BISP 14
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#define CLOCK_CSI1 15
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#define CLOCK_SD3 16
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#define CLOCK_I2C4 17
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#define CLOCK_GPIO 18
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#define CLOCK_DMM 19
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#define CLOCK_I2STX 20
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#define CLOCK_I2SRX 21
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#define CLOCK_HDMIA 22
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#define CLOCK_SPDIF 23
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#define CLOCK_PCM0 24
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#define CLOCK_VDE 25
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#define CLOCK_VCE 26
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#define CLOCK_HDE 27
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#define CLOCK_SHARESRAM 28
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#define CLOCK_CMU_DDR1 29
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#define CLOCK_GPU3D 30
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#define CLOCK_CMUDDR0 31
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#define CLOCK_SPEED 32
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#define CLOCK_I2C5 33
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#define CLOCK_THERMAL 34
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#define CLOCK_HDMI 35
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#define CLOCK_PWM4 36
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#define CLOCK_PWM5 37
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#define CLOCK_UART0 38
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#define CLOCK_UART1 39
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#define CLOCK_UART2 40
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#define CLOCK_IRC 41
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#define CLOCK_SPI0 42
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#define CLOCK_SPI1 43
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#define CLOCK_SPI2 44
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#define CLOCK_SPI3 45
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#define CLOCK_I2C0 46
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#define CLOCK_I2C1 47
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#define CLOCK_PCM1 48
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#define CLOCK_IMX 49
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#define CLOCK_UART6 50
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#define CLOCK_UART3 51
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#define CLOCK_UART4 52
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#define CLOCK_UART5 53
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#define CLOCK_ETHERNET 54
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#define CLOCK_PWM0 55
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#define CLOCK_PWM1 56
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#define CLOCK_PWM2 57
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#define CLOCK_PWM3 58
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#define CLOCK_TIMER 59
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#define CLOCK_SE 60
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#define CLOCK_HDCP2TX 61
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#define CLOCK_I2C2 62
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#define CLOCK_I2C3 63
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#endif
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