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	Commit 1a7904fdfa7d ("mmc: fsl_esdhc_imx: Use esdhc_soc_data
flags to set host caps") exposed the following SD card error:
U-Boot 2023.04-00652-g487e42f7bc5e (Apr 05 2023 - 22:14:21 -0300)
CPU:   Freescale i.MX7D rev1.0 1000 MHz (running at 792 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 35C
Reset cause: POR
Model: Freescale i.MX7 SabreSD Board
Board: i.MX7D SABRESD in non-secure mode
DRAM:  1 GiB
Core:  100 devices, 19 uclasses, devicetree: separate
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x10
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... Card did not respond to voltage
select! : -110
*** Warning - No block device, using default environment
The reason of the problem, as explained by Ye Li:
"When UHS is enabled in defconfig, the usdhc1 node in imx7d-sdb.dts does
not configure pad for VSELECT, also the data pad should be set to
100Mhz/200Mhz pin states."
Apply these changes into u-boot.dtsi for now. When these changes
reach the Linux mainline imx7d-sdb, they can be dropped from u-boot.dtsi.
This fixes UHS mode on the imx7d-sdb board.
Suggested-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
		
	
			
		
			
				
	
	
		
			59 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			59 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| &fec2 {
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| 	status = "disable";
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| };
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| 
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| &usbotg1 {
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| 	dr_mode = "peripheral";
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| };
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| 
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| &usdhc1 {
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| 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
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| 	pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
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| 	pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
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| 	pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
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| };
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| 
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| &pinctrl_usdhc1 {
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| 		fsl,pins = <
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| 			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
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| 			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
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| 			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
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| 			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
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| 			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
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| 			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
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| 		>;
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| };
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| 
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| &iomuxc {
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| 	pinctrl_usdhc1_gpio: usdhc1gpiogrp {
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| 		fsl,pins = <
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| 			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x59 /* CD */
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| 			MX7D_PAD_SD1_WP__GPIO5_IO1		0x59 /* WP */
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| 			MX7D_PAD_SD1_RESET_B__GPIO5_IO2		0x59 /* vmmc */
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| 			MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x59 /* VSELECT */
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| 		>;
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| 	};
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| 
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| 	pinctrl_usdhc1_100mhz: usdhc1100mhzgrp {
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| 		fsl,pins = <
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| 			MX7D_PAD_SD1_CMD__SD1_CMD		0x5a
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| 			MX7D_PAD_SD1_CLK__SD1_CLK		0x1a
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| 			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5a
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| 			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5a
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| 			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5a
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| 			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5a
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| 		>;
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| 	};
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| 
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| 	pinctrl_usdhc1_200mhz: usdhc1200mhzgrp {
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| 		fsl,pins = <
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| 			MX7D_PAD_SD1_CMD__SD1_CMD		0x5b
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| 			MX7D_PAD_SD1_CLK__SD1_CLK		0x1b
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| 			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x5b
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| 			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x5b
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| 			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x5b
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| 			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x5b
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| 		>;
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| 	};
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| };
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